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-rw-r--r--src/soc/amd/picasso/include/soc/romstage.h8
-rw-r--r--src/soc/amd/picasso/romstage.c7
2 files changed, 0 insertions, 15 deletions
diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/romstage.h
deleted file mode 100644
index e7ff31a06e..0000000000
--- a/src/soc/amd/picasso/include/soc/romstage.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef __PICASSO_ROMSTAGE_H__
-#define __PICASSO_ROMSTAGE_H__
-
-void mainboard_romstage_entry_s3(int s3_resume);
-
-#endif /* __PICASSO_ROMSTAGE_H__ */
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 6855bf6129..0a337e7720 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -10,18 +10,12 @@
#include <console/console.h>
#include <program_loading.h>
#include <elog.h>
-#include <soc/romstage.h>
#include <soc/memmap.h>
#include <soc/mrc_cache.h>
#include <types.h>
#include "chip.h"
#include <fsp/api.h>
-void __weak mainboard_romstage_entry_s3(int s3_resume)
-{
- /* By default, don't do anything */
-}
-
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
{
FSP_M_CONFIG *mcfg = &mupd->FspmConfig;
@@ -80,7 +74,6 @@ asmlinkage void car_stage_entry(void)
post_code(0x41);
s3_resume = acpi_s3_resume_allowed() && acpi_is_wakeup_s3();
- mainboard_romstage_entry_s3(s3_resume);
post_code(0x42);
u32 val = cpuid_eax(1);