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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
-rw-r--r--src/soc/amd/stoneyridge/psp.c4
2 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 8d8203516c..219af8437a 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -205,8 +205,6 @@ void soc_enable_psp_early(void);
#define BAR3HIDE BIT(12) /* Bit to hide BAR3 addr */
#define PSP_MAILBOX_BAR_EN BIT(4)
-#define MSR_CU_CBBCFG 0xc00110a2 /* PSP Pvt Blk Base Addr */
-
typedef struct aoac_devs {
unsigned int :5;
unsigned int ic0e:1; /* 5: I2C0 */
diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c
index c24b8be1df..a7fead73dc 100644
--- a/src/soc/amd/stoneyridge/psp.c
+++ b/src/soc/amd/stoneyridge/psp.c
@@ -44,9 +44,9 @@ void *soc_get_mbox_address(void)
/* Determine if Bar3Hide has been set, and if hidden get the base from
* the MSR instead. */
if (pci_read_config32(SOC_PSP_DEV, PSP_BAR_ENABLES) & BAR3HIDE) {
- psp_mmio = rdmsr(MSR_CU_CBBCFG).lo;
+ psp_mmio = rdmsr(MSR_PSP_ADDR).lo;
if (psp_mmio == 0xffffffff) {
- printk(BIOS_WARNING, "PSP: BAR hidden, MSR val uninitialized\n");
+ printk(BIOS_WARNING, "PSP: BAR hidden, MSR_PSP_ADDR uninitialized\n");
return 0;
}
} else {