4 files changed, 2 insertions, 67 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index dd514ab88f..0555afbba8 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -350,38 +350,7 @@ void sb_read_mode(u32 mode);
 void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm);
 void bootblock_fch_early_init(void);
 void bootblock_fch_init(void);
-/**
- * @brief Save the UMA bize returned by AGESA
- *
- * @param size = in bytes
- *
- * @return none
- */
-void save_uma_size(uint32_t size);
-/**
- * @brief Save the UMA base address returned by AGESA
- *
- * @param base = 64bit base address
- *
- * @return none
- */
-void save_uma_base(uint64_t base);
-/**
- * @brief Get the saved UMA size
- *
- * @param none
- *
- * @return size in bytes
- */
-uint32_t get_uma_size(void);
-/**
- * @brief Get the saved UMA base
- *
- * @param none
- *
- * @return 64bit base address
- */
-uint64_t get_uma_base(void);
+
 /*
  * Call the mainboard to get the USB Over Current Map. The mainboard
  * returns the map and 0 on Success or -1 on error or no map. There is
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c
index 82d6fb6e8e..ae5a331259 100644
--- a/src/soc/amd/stoneyridge/memmap.c
+++ b/src/soc/amd/stoneyridge/memmap.c
@@ -28,16 +28,6 @@
 #include <soc/iomap.h>
 #include <amdblocks/acpimmio.h>
 
-void backup_top_of_low_cacheable(uintptr_t ramtop)
-{
-	biosram_write32(BIOSRAM_CBMEM_TOP, ramtop);
-}
-
-uintptr_t restore_top_of_low_cacheable(void)
-{
-	return biosram_read32(BIOSRAM_CBMEM_TOP);
-}
-
 #if CONFIG(ACPI_BERT)
  #if CONFIG_SMM_TSEG_SIZE == 0x0
   #define BERT_REGION_MAX_SIZE 0x100000
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 044a1b05ca..c98d0a9517 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <amdblocks/biosram.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
@@ -32,7 +33,6 @@
 #include <agesa_headers.h>
 #include <soc/cpu.h>
 #include <soc/northbridge.h>
-#include <soc/southbridge.h>
 #include <soc/pci_devs.h>
 #include <soc/iomap.h>
 #include <stdint.h>
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 85c7eafcf1..1b2afec3f1 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -648,27 +648,3 @@ static void set_pci_irqs(void *unused)
  * on entry into BS_DEV_ENABLE.
  */
 BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
-
-void save_uma_size(uint32_t size)
-{
-	biosram_write32(BIOSRAM_UMA_SIZE, size);
-}
-
-void save_uma_base(uint64_t base)
-{
-	biosram_write32(BIOSRAM_UMA_BASE, (uint32_t) base);
-	biosram_write32(BIOSRAM_UMA_BASE + 4, (uint32_t) (base >> 32));
-}
-
-uint32_t get_uma_size(void)
-{
-	return biosram_read32(BIOSRAM_UMA_SIZE);
-}
-
-uint64_t get_uma_base(void)
-{
-	uint64_t base;
-	base = biosram_read32(BIOSRAM_UMA_BASE);
-	base |= ((uint64_t)(biosram_read32(BIOSRAM_UMA_BASE + 4)) << 32);
-	return base;
-}