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Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c33
1 files changed, 0 insertions, 33 deletions
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 2ffbc92e01..a5cbb10a63 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -23,7 +23,6 @@
#include <soc/southbridge.h>
#include <soc/smi.h>
#include <soc/amd_pci_int_defs.h>
-#include <delay.h>
#include <soc/pci_devs.h>
#include <agesa_headers.h>
#include <soc/acpi.h>
@@ -32,21 +31,6 @@
#include <soc/nvs.h>
#include <types.h>
-/*
- * Table of devices that need their AOAC registers enabled and waited
- * upon (usually about .55 milliseconds). Instead of individual delays
- * waiting for each device to become available, a single delay will be
- * executed.
- */
-static const unsigned int aoac_devs[] = {
- FCH_AOAC_DEV_UART0 + CONFIG_UART_FOR_CONSOLE * 2,
- FCH_AOAC_DEV_AMBA,
- FCH_AOAC_DEV_I2C0,
- FCH_AOAC_DEV_I2C1,
- FCH_AOAC_DEV_I2C2,
- FCH_AOAC_DEV_I2C3,
-};
-
static int is_sata_config(void)
{
return !((SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE)
@@ -152,23 +136,6 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
-void enable_aoac_devices(void)
-{
- bool status;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- power_on_aoac_device(aoac_devs[i]);
-
- /* Wait for AOAC devices to indicate power and clock OK */
- do {
- udelay(100);
- status = true;
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- status &= is_aoac_device_enabled(aoac_devs[i]);
- } while (!status);
-}
-
static void sb_enable_lpc(void)
{
u8 byte;