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Diffstat (limited to 'src/soc/amd/stoneyridge/sd.c')
-rw-r--r--src/soc/amd/stoneyridge/sd.c31
1 files changed, 15 insertions, 16 deletions
diff --git a/src/soc/amd/stoneyridge/sd.c b/src/soc/amd/stoneyridge/sd.c
index 484dee4227..7188aad55f 100644
--- a/src/soc/amd/stoneyridge/sd.c
+++ b/src/soc/amd/stoneyridge/sd.c
@@ -25,27 +25,26 @@ static void sd_init(struct device *dev)
{
u32 stepping;
- stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xFC);
+ stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)),
+ 0xfc);
struct soc_amd_stoneyridge_config *sd_chip =
(struct soc_amd_stoneyridge_config *)(dev->chip_info);
if (sd_chip->sd_mode == 3) { /* SD 3.0 mode */
- pci_write_config32(dev, 0xA4, 0x31FEC8B2);
- pci_write_config32(dev, 0xA8, 0x00002503);
- pci_write_config32(dev, 0xB0, 0x02180C19);
- pci_write_config32(dev, 0xD0, 0x0000078B);
- }
- else { /* SD 2.0 mode */
- if ((stepping & 0x0000000F) == 0) { /* Stepping A0 */
- pci_write_config32(dev, 0xA4, 0x31DE32B2);
- pci_write_config32(dev, 0xB0, 0x01180C19);
- pci_write_config32(dev, 0xD0, 0x0000058B);
- }
- else { /* Stepping >= A1 */
- pci_write_config32(dev, 0xA4, 0x31FE3FB2);
- pci_write_config32(dev, 0xB0, 0x01180C19);
- pci_write_config32(dev, 0xD0, 0x0000078B);
+ pci_write_config32(dev, 0xa4, 0x31fec8b2);
+ pci_write_config32(dev, 0xa8, 0x00002503);
+ pci_write_config32(dev, 0xb0, 0x02180c19);
+ pci_write_config32(dev, 0xd0, 0x0000078b);
+ } else { /* SD 2.0 mode */
+ if ((stepping & 0x0000000f) == 0) { /* Stepping A0 */
+ pci_write_config32(dev, 0xa4, 0x31de32b2);
+ pci_write_config32(dev, 0xb0, 0x01180c19);
+ pci_write_config32(dev, 0xd0, 0x0000058b);
+ } else { /* Stepping >= A1 */
+ pci_write_config32(dev, 0xa4, 0x31fe3fb2);
+ pci_write_config32(dev, 0xb0, 0x01180c19);
+ pci_write_config32(dev, 0xd0, 0x0000078b);
}
}
}