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-rw-r--r--src/soc/amd/stoneyridge/include/soc/acpi.h2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/nvs.h9
2 files changed, 5 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index c44e934225..9617b45eca 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -14,8 +14,6 @@
unsigned long southbridge_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);
-void southbridge_inject_dsdt(const struct device *device);
-
const char *soc_acpi_name(const struct device *dev);
#endif /* __SOC_STONEYRIDGE_ACPI_H__ */
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 2b949c9c3b..864cfffa1a 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
- * NOTE: The layout of the global_nvs_t structure below must match the layout
+ * NOTE: The layout of the global_nvs structure below must match the layout
* in soc/soc/amd/stoneyridge/acpi/globalnvs.asl !!!
*
*/
@@ -14,7 +14,7 @@
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/southbridge.h>
-typedef struct global_nvs_t {
+struct __packed global_nvs {
/* Miscellaneous */
uint8_t pcnt; /* 0x00 - Processor Count */
uint8_t ppcm; /* 0x01 - Max PPC State */
@@ -46,7 +46,8 @@ typedef struct global_nvs_t {
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
-} __packed global_nvs_t;
-check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
+};
+
+check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
#endif /* __SOC_STONEYRIDGE_NVS_H__ */