diff options
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/fchec.h | 24 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/amd_pci_int_defs.h | 6 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/imc.h | 24 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/smi.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 3 |
5 files changed, 0 insertions, 58 deletions
diff --git a/src/soc/amd/stoneyridge/include/fchec.h b/src/soc/amd/stoneyridge/include/fchec.h deleted file mode 100644 index 80125ecaad..0000000000 --- a/src/soc/amd/stoneyridge/include/fchec.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __AMD_STONEY_FCHEC__ -#define __AMD_STONEY_FCHEC__ - -#include <amdblocks/agesawrapper.h> -#include <soc/imc.h> - -void agesawrapper_fchecfancontrolservice(void); - -#endif diff --git a/src/soc/amd/stoneyridge/include/soc/amd_pci_int_defs.h b/src/soc/amd/stoneyridge/include/soc/amd_pci_int_defs.h index e160c89283..beef2bcc81 100644 --- a/src/soc/amd/stoneyridge/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/stoneyridge/include/soc/amd_pci_int_defs.h @@ -47,12 +47,6 @@ #define PIRQ_PMON 0x16 /* Performance Monitor */ #define PIRQ_SD 0x17 /* SD */ #define PIRQ_SDIO 0x1a /* SDIO */ -#define PIRQ_IMC0 0x20 /* IMC INT0 */ -#define PIRQ_IMC1 0x21 /* IMC INT1 */ -#define PIRQ_IMC2 0x22 /* IMC INT2 */ -#define PIRQ_IMC3 0x23 /* IMC INT3 */ -#define PIRQ_IMC4 0x24 /* IMC INT4 */ -#define PIRQ_IMC5 0x25 /* IMC INT5 */ #define PIRQ_EHCI 0x30 /* USB EHCI 12h.0 */ #define PIRQ_XHCI 0x34 /* USB XHCI 10h.0 */ #define PIRQ_SATA 0x41 /* SATA 11h.0 */ diff --git a/src/soc/amd/stoneyridge/include/soc/imc.h b/src/soc/amd/stoneyridge/include/soc/imc.h deleted file mode 100644 index 079df79dc4..0000000000 --- a/src/soc/amd/stoneyridge/include/soc/imc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __STONEYRIDGE_IMC_H__ -#define __STONEYRIDGE_IMC_H__ - -void imc_reg_init(void); -void enable_imc_thermal_zone(void); -void imc_sleep(void); -void imc_wakeup(void); - -#endif diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index 636f9c3559..24543516c2 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -125,7 +125,6 @@ #define SMITYPE_USB_SMI 76 #define SMITYPE_SERIRQ 77 #define SMITYPE_SMBUS0_INTR 78 -#define SMITYPE_IMC 79 #define SMITYPE_XHC_ERROR 80 #define SMITYPE_INTRUDER 81 #define SMITYPE_VBAT_LOW 82 diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 2e953091f8..ece78b625e 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -110,9 +110,6 @@ #define SPI_PRESERVE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3)) #define LPC_PCI_CONTROL 0x40 -#define IMC_PRESENT BIT(7) -#define IMC_TO_HOST_SEMAPHORE BIT(6) -#define HOST_TO_IMC_SEMAPHORE BIT(5) #define LEGACY_DMA_EN BIT(2) #define LPC_IO_PORT_DECODE_ENABLE 0x44 |