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-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h1
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h5
2 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index f39200f0fe..350618fc5c 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -44,6 +44,5 @@
#define BIOSRAM_DATA 0xcd5
#define AB_INDX 0xcd8
#define AB_DATA (AB_INDX+4)
-#define SYS_RESET 0xcf9
#endif /* AMD_STONEYRIDGE_IOMAP_H */
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index c627f7ec7c..f963fdfe84 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -207,11 +207,6 @@ void soc_enable_psp_early(void);
#define MSR_CU_CBBCFG 0xc00110a2 /* PSP Pvt Blk Base Addr */
#define BAR3HIDE BIT(12) /* Bit to hide BAR3 addr */
-/* IO 0xcf9 - Reset control port*/
-#define FULL_RST BIT(3)
-#define RST_CMD BIT(2)
-#define SYS_RST BIT(1)
-
typedef struct aoac_devs {
unsigned int :5;
unsigned int ic0e:1; /* 5: I2C0 */