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-rw-r--r--src/soc/amd/stoneyridge/include/soc/cpu.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/cpu.h b/src/soc/amd/stoneyridge/include/soc/cpu.h
index 8d25fb6d4e..528daa4125 100644
--- a/src/soc/amd/stoneyridge/include/soc/cpu.h
+++ b/src/soc/amd/stoneyridge/include/soc/cpu.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef __STONEYRIDGE_CPU_H__
-#define __STONEYRIDGE_CPU_H__
+#ifndef AMD_STONEYRIDGE_CPU_H
+#define AMD_STONEYRIDGE_CPU_H
/*
* Set a variable MTRR in bootblock and/or romstage. AGESA will use the lowest
@@ -16,4 +16,4 @@
void check_mca(void);
-#endif /* __STONEYRIDGE_CPU_H__ */
+#endif /* AMD_STONEYRIDGE_CPU_H */