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Diffstat (limited to 'src/soc/amd/stoneyridge/include/soc/cpu.h')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/cpu.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/cpu.h b/src/soc/amd/stoneyridge/include/soc/cpu.h
index ea51f76a3e..8d25fb6d4e 100644
--- a/src/soc/amd/stoneyridge/include/soc/cpu.h
+++ b/src/soc/amd/stoneyridge/include/soc/cpu.h
@@ -3,8 +3,6 @@
#ifndef __STONEYRIDGE_CPU_H__
#define __STONEYRIDGE_CPU_H__
-#include <device/device.h>
-
/*
* Set a variable MTRR in bootblock and/or romstage. AGESA will use the lowest
* numbered registers. Any values defined below are subtracted from the
@@ -16,7 +14,6 @@
#define SOC_EARLY_VMTRR_CAR_HEAP 2
#define SOC_EARLY_VMTRR_TEMPRAM 3
-void stoney_init_cpus(struct device *dev);
void check_mca(void);
#endif /* __STONEYRIDGE_CPU_H__ */