diff options
Diffstat (limited to 'src/soc/amd/stoneyridge/bootblock/bootblock.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/bootblock/bootblock.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c index 32b129862d..8efe744384 100644 --- a/src/soc/amd/stoneyridge/bootblock/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> #include <device/pci_ids.h> +#include <soc/pci_devs.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. @@ -31,7 +32,7 @@ static void hudson_enable_rom(void) u8 reg8; pci_devfn_t dev; - dev = PCI_DEV(0, 0x14, 3); + dev = PCI_DEV(0, PCU_DEV, LPC_FUNC); /* Decode variable LPC ROM address ranges 1 and 2. */ reg8 = pci_io_read_config8(dev, 0x48); @@ -52,7 +53,8 @@ static void hudson_enable_rom(void) * 0xffe0(0000): 2MB * 0xffc0(0000): 4MB */ - pci_io_write_config16(dev, 0x6c, 0x10000 - (CONFIG_COREBOOT_ROMSIZE_KB >> 6)); + pci_io_write_config16(dev, 0x6c, 0x10000 + - (CONFIG_COREBOOT_ROMSIZE_KB >> 6)); /* Enable LPC ROM range end at 0xffff(ffff). */ pci_io_write_config16(dev, 0x6e, 0xffff); } |