summaryrefslogtreecommitdiff
path: root/src/soc/amd/picasso
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/chip.h2
-rw-r--r--src/soc/amd/picasso/fch.c6
2 files changed, 5 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index d59a4c8207..d2ce1bcfdc 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -257,6 +257,8 @@ struct soc_amd_picasso_config {
/* The array index is the general purpose PCIe clock output number. */
enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT];
+ /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
+ bool acp_i2s_use_external_48mhz_osc;
/* eDP phy tuning settings */
uint16_t edp_phy_override;
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index a871ccf9cb..e1c0eba9b5 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -90,12 +90,12 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
void sb_clk_output_48Mhz(void)
{
u32 ctrl;
- const struct soc_amd_common_config *cfg = soc_get_common_config();
+ const struct soc_amd_picasso_config *cfg = config_of_soc();
ctrl = misc_read32(MISC_CLK_CNTL1);
/* If used external clock source for I2S, disable the internal clock output */
- if (cfg->acp_config.acp_i2s_use_external_48mhz_osc &&
- cfg->acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM)
+ if (cfg->acp_i2s_use_external_48mhz_osc &&
+ cfg->common_config.acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM)
ctrl &= ~BP_X48M0_OUTPUT_EN;
else
ctrl |= BP_X48M0_OUTPUT_EN;