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Diffstat (limited to 'src/soc/amd/picasso/reset.c')
-rw-r--r--src/soc/amd/picasso/reset.c23
1 files changed, 4 insertions, 19 deletions
diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c
index ec5ee910d9..98410387fb 100644
--- a/src/soc/amd/picasso/reset.c
+++ b/src/soc/amd/picasso/reset.c
@@ -25,32 +25,18 @@
void set_warm_reset_flag(void)
{
- u32 htic;
- htic = pci_read_config32(SOC_HT_DEV, HT_INIT_CONTROL);
- htic |= HTIC_COLD_RST_DET;
- pci_write_config32(SOC_HT_DEV, HT_INIT_CONTROL, htic);
-}
+ uint8_t ncp = inw(NCP_ERR);
-int is_warm_reset(void)
-{
- u32 htic;
- htic = pci_read_config32(SOC_HT_DEV, HT_INIT_CONTROL);
- return !!(htic & HTIC_COLD_RST_DET);
+ outb(NCP_ERR, ncp | NCP_WARM_BOOT);
}
-/* Clear bits 5, 9 & 10, used to signal the reset type */
-static void clear_bios_reset(void)
+int is_warm_reset(void)
{
- u32 htic;
- htic = pci_read_config32(SOC_HT_DEV, HT_INIT_CONTROL);
- htic &= ~HTIC_BIOSR_DETECT;
- pci_write_config32(SOC_HT_DEV, HT_INIT_CONTROL, htic);
+ return !!(inb(NCP_ERR) & NCP_WARM_BOOT);
}
void do_cold_reset(void)
{
- clear_bios_reset();
-
/* De-assert and then assert all PwrGood signals on CF9 reset. */
pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) |
TOGGLE_ALL_PWR_GOOD);
@@ -60,7 +46,6 @@ void do_cold_reset(void)
void do_warm_reset(void)
{
set_warm_reset_flag();
- clear_bios_reset();
/* Assert reset signals only. */
outb(RST_CMD | SYS_RST, SYS_RESET);