diff options
Diffstat (limited to 'src/soc/amd/picasso/memmap.c')
| -rw-r--r-- | src/soc/amd/picasso/memmap.c | 48 |
1 files changed, 17 insertions, 31 deletions
diff --git a/src/soc/amd/picasso/memmap.c b/src/soc/amd/picasso/memmap.c index c6fd11874a..7b504afc75 100644 --- a/src/soc/amd/picasso/memmap.c +++ b/src/soc/amd/picasso/memmap.c @@ -6,37 +6,11 @@ #include <assert.h> #include <stdint.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <cpu/x86/smm.h> #include <cpu/amd/msr.h> -#include <cpu/amd/mtrr.h> -#include <cbmem.h> -#include <arch/bert_storage.h> -#include <soc/northbridge.h> -#include <soc/iomap.h> -#include <amdblocks/acpimmio.h> - -void *cbmem_top_chipset(void) -{ - msr_t tom = rdmsr(TOP_MEM); - - if (!tom.lo) - return 0; - - /* 8MB alignment to keep MTRR usage low */ - return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() - - CONFIG_SMM_TSEG_SIZE, 8*MiB); -} - -static uintptr_t smm_region_start(void) -{ - return (uintptr_t)cbmem_top(); -} - -static size_t smm_region_size(void) -{ - return CONFIG_SMM_TSEG_SIZE; -} +#include <memrange.h> +#include <fsp/util.h> +#include <FspGuids.h> /* * For data stored in TSEG, ensure TValid is clear so R/W access can reach @@ -63,9 +37,21 @@ static void clear_tvalid(void) void smm_region(uintptr_t *start, size_t *size) { static int once; + struct range_entry tseg; + int status; + + *start = 0; + *size = 0; + + status = fsp_find_range_hob(&tseg, AMD_FSP_TSEG_HOB_GUID.b); + + if (status < 0) { + printk(BIOS_ERR, "Error: unable to find TSEG HOB\n"); + return; + } - *start = smm_region_start(); - *size = smm_region_size(); + *start = (uintptr_t)range_entry_base(&tseg); + *size = range_entry_size(&tseg); if (!once) { clear_tvalid(); |