diff options
Diffstat (limited to 'src/soc/amd/picasso/include')
| -rw-r--r-- | src/soc/amd/picasso/include/soc/southbridge.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index 220d92ea7a..c7f30e24ec 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -13,14 +13,6 @@ * - fixed addresses offset from 0xfed80000 */ -/* SMBus controller registers: 0xfed80000 or D14F0 */ -#define SMB_UART_CONFIG 0xfc -#define SMB_UART3_1_8M BIT(31) /* defaults are 0 = 48MHz */ -#define SMB_UART2_1_8M BIT(30) -#define SMB_UART1_1_8M BIT(29) -#define SMB_UART0_1_8M BIT(28) -#define SMB_UART_1_8M_SHIFT 28 - /* Power management registers: 0xfed80300 or index/data at IO 0xcd6/cd7 */ #define PM_PCI_CTRL 0x08 #define FORCE_SLPSTATE_RETRY BIT(25) @@ -144,13 +136,6 @@ #define FCH_AOAC_DEV_ESPI 27 #define FCH_LEGACY_UART_DECODE (ALINK_AHB_ADDRESS + 0x20) /* 0xfedc0020 */ -#define FCH_LEGACY_UART_MAP_SHIFT 8 -#define FCH_LEGACY_UART_MAP_SIZE 2 -#define FCH_LEGACY_UART_MAP_MASK 0x3 -#define FCH_LEGACY_UART_RANGE_2E8 0 -#define FCH_LEGACY_UART_RANGE_2F8 1 -#define FCH_LEGACY_UART_RANGE_3E8 2 -#define FCH_LEGACY_UART_RANGE_3F8 3 #define PM1_LIMIT 16 #define GPE0_LIMIT 28 @@ -196,7 +181,6 @@ void southbridge_final(void *chip_info); void southbridge_init(void *chip_info); void fch_pre_init(void); void fch_early_init(void); -void set_uart_legacy_config(unsigned int uart_idx, unsigned int range_idx); /* Initialize all the i2c buses that are marked with early init. */ void i2c_soc_early_init(void); |