diff options
Diffstat (limited to 'src/soc/amd/glinda')
| -rw-r--r-- | src/soc/amd/glinda/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/glinda/include/soc/msr.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/glinda/acpi.c b/src/soc/amd/glinda/acpi.c index ce0c7e6001..1accc962d4 100644 --- a/src/soc/amd/glinda/acpi.c +++ b/src/soc/amd/glinda/acpi.c @@ -106,7 +106,7 @@ uint32_t get_pstate_core_freq(union pstate_msr pstate_reg) core_freq_mul = pstate_reg.cpu_fid_0_11; /* CPU frequency is 5 * core_freq_mul */ - return PSTATE_DEF_LO_CORE_FREQ_BASE * core_freq_mul; + return PSTATE_DEF_CORE_FREQ_BASE * core_freq_mul; } uint32_t get_pstate_core_power(union pstate_msr pstate_reg) diff --git a/src/soc/amd/glinda/include/soc/msr.h b/src/soc/amd/glinda/include/soc/msr.h index 2c5b933b96..3f9254971c 100644 --- a/src/soc/amd/glinda/include/soc/msr.h +++ b/src/soc/amd/glinda/include/soc/msr.h @@ -20,7 +20,7 @@ union pstate_msr { uint64_t raw; }; -#define PSTATE_DEF_LO_CORE_FREQ_BASE 5 +#define PSTATE_DEF_CORE_FREQ_BASE 5 /* Value defined in Serial VID Interface 3.0 spec (#56413, NDA only) */ #define SERIAL_VID_DECODE_MICROVOLTS 5000 |