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-rw-r--r--src/soc/amd/genoa/Kconfig1
-rw-r--r--src/soc/amd/genoa/Makefile.inc2
-rw-r--r--src/soc/amd/genoa/aoac.c32
-rw-r--r--src/soc/amd/genoa/early_fch.c2
-rw-r--r--src/soc/amd/genoa/include/soc/aoac_defs.h20
5 files changed, 57 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index 9863a59eed..d3803652c7 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -10,6 +10,7 @@ config SOC_SPECIFIC_OPTIONS
select RESET_VECTOR_IN_RAM
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc
index 6b936b60f4..2f7241d7c2 100644
--- a/src/soc/amd/genoa/Makefile.inc
+++ b/src/soc/amd/genoa/Makefile.inc
@@ -6,9 +6,11 @@ all-y += reset.c
all-y += config.c
bootblock-y += early_fch.c
+bootblock-y += aoac.c
romstage-y += romstage.c
+ramstage-y += aoac.c
ramstage-y += chip.c
CPPFLAGS_common += -I$(src)/soc/amd/genoa/include
diff --git a/src/soc/amd/genoa/aoac.c b/src/soc/amd/genoa/aoac.c
new file mode 100644
index 0000000000..53ba88f1b9
--- /dev/null
+++ b/src/soc/amd/genoa/aoac.c
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <stdint.h>
+#include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
+#include <soc/aoac_defs.h>
+#include <soc/southbridge.h>
+#include <delay.h>
+
+#define FCH_AOAC_UART_FOR_CONSOLE \
+ (CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
+ : CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
+ : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
+ : -1)
+#if CONFIG(AMD_SOC_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1
+# error Unsupported UART_FOR_CONSOLE chosen
+#endif
+
+void wait_for_aoac_enabled(unsigned int dev)
+{
+ while (!is_aoac_device_enabled(dev))
+ udelay(100);
+}
+
+void enable_aoac_devices(void)
+{
+ if (CONFIG(AMD_SOC_CONSOLE_UART))
+ power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
+
+ if (CONFIG(AMD_SOC_CONSOLE_UART))
+ wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);
+}
diff --git a/src/soc/amd/genoa/early_fch.c b/src/soc/amd/genoa/early_fch.c
index d0b526cea5..21e988e763 100644
--- a/src/soc/amd/genoa/early_fch.c
+++ b/src/soc/amd/genoa/early_fch.c
@@ -12,6 +12,8 @@
void fch_pre_init(void)
{
fch_enable_cf9_io();
+
+ enable_aoac_devices();
}
/* After console init */
diff --git a/src/soc/amd/genoa/include/soc/aoac_defs.h b/src/soc/amd/genoa/include/soc/aoac_defs.h
new file mode 100644
index 0000000000..90f4de8a3b
--- /dev/null
+++ b/src/soc/amd/genoa/include/soc/aoac_defs.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_GENOA_AOAC_DEFS_H
+#define AMD_GENOA_AOAC_DEFS_H
+
+/* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */
+#define FCH_AOAC_DEV_CLK_GEN 0
+#define FCH_AOAC_DEV_I2C0 5
+#define FCH_AOAC_DEV_I2C1 6
+#define FCH_AOAC_DEV_I2C2 7
+#define FCH_AOAC_DEV_I2C3 8
+#define FCH_AOAC_DEV_I2C4 9
+#define FCH_AOAC_DEV_I2C5 10
+#define FCH_AOAC_DEV_UART0 11
+#define FCH_AOAC_DEV_UART1 12
+#define FCH_AOAC_DEV_UART2 16
+#define FCH_AOAC_DEV_AMBA 17
+#define FCH_AOAC_DEV_ESPI 27
+
+#endif /* AMD_GENOA_AOAC_DEFS_H */