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-rw-r--r--src/soc/amd/common/block/cpu/car/cache_as_ram.S5
-rw-r--r--src/soc/amd/common/block/cpu/noncar/pre_c.S7
-rw-r--r--src/soc/amd/common/block/include/amdblocks/post_codes.h33
3 files changed, 40 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/cpu/car/cache_as_ram.S b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
index 251e23aaad..b38ce80895 100644
--- a/src/soc/amd/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
@@ -8,6 +8,7 @@
******************************************************************************
*/
+#include <amdblocks/post_codes.h>
#include <cpu/x86/post_code.h>
.section .init
@@ -27,7 +28,7 @@ _cache_as_ram_setup:
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
- post_code(0xa0)
+ post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
AMD_ENABLE_STACK
@@ -41,7 +42,7 @@ bootblock_pre_c_entry:
pushl %eax /* tsc[31:0] */
before_carstage:
- post_code(0xa2)
+ post_code(POST_BOOTBLOCK_PRE_C_DONE)
call bootblock_c_entry
/* Never reached */
diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S
index 503de3b5f4..e123c361cc 100644
--- a/src/soc/amd/common/block/cpu/noncar/pre_c.S
+++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S
@@ -1,12 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/post_codes.h>
#include <cpu/x86/post_code.h>
.section .init, "ax", @progbits
.global bootblock_resume_entry
bootblock_resume_entry:
- post_code(0xb0)
+ post_code(POST_BOOTBLOCK_RESUME_ENTRY)
/* Get an early timestamp */
rdtsc
@@ -23,7 +24,7 @@ bootblock_resume_entry:
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
- post_code(0xa0)
+ post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
#if ENV_X86_64
#include <cpu/x86/64bit/entry64.inc>
@@ -56,7 +57,7 @@ bootblock_pre_c_entry:
pushl %eax /* tsc[31:0] */
#endif
- post_code(0xa2)
+ post_code(POST_BOOTBLOCK_PRE_C_DONE)
call bootblock_c_entry
/* Never reached */
diff --git a/src/soc/amd/common/block/include/amdblocks/post_codes.h b/src/soc/amd/common/block/include/amdblocks/post_codes.h
new file mode 100644
index 0000000000..5251769731
--- /dev/null
+++ b/src/soc/amd/common/block/include/amdblocks/post_codes.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_BLOCK_POST_CODES_H
+#define AMD_BLOCK_POST_CODES_H
+
+#define POST_AGESA_AMDINITRESET 0x37
+#define POST_AGESA_AMDINITEARLY 0x38
+
+#define POST_ROMSTAGE_MAIN 0x40
+
+#define POST_AGESA_AMDINITPOST 0x40
+#define POST_AGESA_AMDINITPOST_DONE 0x41
+
+#define POST_PSP_NOTIFY_DRAM 0x42
+#define POST_PSP_NOTIFY_DRAM_DONE 0x43
+
+#define POST_ROMSTAGE_RUN_POSTCAR 0x44
+
+#define POST_PSP_LOAD_SMU 0x46
+#define POST_AGESA_AMDINITENV 0x47
+#define POST_AGESA_AMDS3LATERESTORE 0x48
+
+#define POST_AGESA_AMDINITRESUME 0x60
+#define POST_AGESA_AMDINITRESUME_DONE 0x61
+
+#define POST_BOOTBLOCK_SOC_EARLY_INIT 0x90
+
+
+#define POST_BOOTBLOCK_RESUME_ENTRY 0xb0
+#define POST_BOOTBLOCK_PRE_C_ENTRY 0xa0
+#define POST_BOOTBLOCK_PRE_C_DONE 0xa2
+
+#endif