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-rw-r--r--src/soc/amd/common/block/cpu/car/cache_as_ram.S11
-rw-r--r--src/soc/amd/common/block/cpu/noncar/pre_c.S2
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/cpu/car/cache_as_ram.S b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
index 3eb7670784..6282d7e571 100644
--- a/src/soc/amd/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
@@ -8,9 +8,16 @@
******************************************************************************
*/
-#include "gcccar.inc"
#include <cpu/x86/post_code.h>
+.section .init
+
+.code32
+
+_cache_as_ram_setup:
+
+#include "gcccar.inc"
+
/*
* on entry:
* mm0: BIST (ignored)
@@ -43,3 +50,5 @@ before_carstage:
post_code(POST_DEAD_CODE)
hlt
jmp .halt_forever
+
+_cache_as_ram_setup_end:
diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S
index 6fae1ed1cb..520e3c08b0 100644
--- a/src/soc/amd/common/block/cpu/noncar/pre_c.S
+++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S
@@ -2,6 +2,8 @@
#include <cpu/x86/post_code.h>
+.section .init, "ax", @progbits
+
.global bootblock_resume_entry
bootblock_resume_entry:
post_code(0xb0)