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-rw-r--r--src/soc/amd/common/block/cpu/Kconfig2
-rw-r--r--src/soc/amd/common/block/cpu/noncar/bootblock.c6
-rw-r--r--src/soc/amd/common/block/cpu/tsc/Makefile.inc5
-rw-r--r--src/soc/amd/common/block/cpu/tsc/monotonic_timer.c15
-rw-r--r--src/soc/amd/common/vboot/vboot_bootblock.c26
5 files changed, 21 insertions, 33 deletions
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig
index 5a1f86a6fa..f7946c3fa3 100644
--- a/src/soc/amd/common/block/cpu/Kconfig
+++ b/src/soc/amd/common/block/cpu/Kconfig
@@ -98,9 +98,9 @@ config SOC_AMD_COMMON_BLOCK_SVI3
config SOC_AMD_COMMON_BLOCK_TSC
bool
- select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
select TSC_SYNC_LFENCE
select UDELAY_TSC
+ select TSC_MONOTONIC_TIMER
help
Select this option to add the common functions for getting the TSC
frequency of AMD family 17h, 19h and 1Ah CPUs/APUs and to provide
diff --git a/src/soc/amd/common/block/cpu/noncar/bootblock.c b/src/soc/amd/common/block/cpu/noncar/bootblock.c
index 13bac18714..9ef899e5ac 100644
--- a/src/soc/amd/common/block/cpu/noncar/bootblock.c
+++ b/src/soc/amd/common/block/cpu/noncar/bootblock.c
@@ -16,12 +16,6 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
write_resume_eip();
enable_pci_mmconf();
- /*
- * base_timestamp is raw tsc value. We need to divide by tsc_freq_mhz
- * to get micro-seconds granularity.
- */
- base_timestamp /= tsc_freq_mhz();
-
if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
boot_with_psp_timestamp(base_timestamp);
diff --git a/src/soc/amd/common/block/cpu/tsc/Makefile.inc b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
index 67bd6fbaeb..ade49707ca 100644
--- a/src/soc/amd/common/block/cpu/tsc/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
@@ -23,18 +23,13 @@ smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_TSC),y)
bootblock-y += tsc_freq.c
-bootblock-y += monotonic_timer.c
verstage_x86-y += tsc_freq.c
-verstage_x86-y += monotonic_timer.c
romstage-y += tsc_freq.c
-romstage-y += monotonic_timer.c
ramstage-y += tsc_freq.c
-ramstage-y += monotonic_timer.c
smm-y += tsc_freq.c
-smm-y += monotonic_timer.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_TSC
diff --git a/src/soc/amd/common/block/cpu/tsc/monotonic_timer.c b/src/soc/amd/common/block/cpu/tsc/monotonic_timer.c
deleted file mode 100644
index 4cedc3d3a2..0000000000
--- a/src/soc/amd/common/block/cpu/tsc/monotonic_timer.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <cpu/x86/tsc.h>
-#include <timer.h>
-#include <timestamp.h>
-
-void timer_monotonic_get(struct mono_time *mt)
-{
- mono_time_set_usecs(mt, timestamp_get());
-}
-
-uint64_t timestamp_get(void)
-{
- return rdtscll() / tsc_freq_mhz();
-}
diff --git a/src/soc/amd/common/vboot/vboot_bootblock.c b/src/soc/amd/common/vboot/vboot_bootblock.c
index 1375e9823d..07039fd3b5 100644
--- a/src/soc/amd/common/vboot/vboot_bootblock.c
+++ b/src/soc/amd/common/vboot/vboot_bootblock.c
@@ -2,9 +2,22 @@
#include <bootblock_common.h>
#include <console/console.h>
+#include <cpu/x86/tsc.h>
#include <soc/psp_transfer.h>
#include <symbols.h>
#include <timestamp.h>
+#include <types.h>
+
+/*
+ * Verstage on PSP uses the weak timestamp_tick_freq_mhz implementation returning 1, so the
+ * unit of the timestamps in the transfer buffer is microseconds. The x86 side uses the TSC
+ * rate as reference for the timestamps, so the values from the PSP transfer buffer need to be
+ * multiplied by the TSC frequency in MHz.
+ */
+static uint64_t timestamp_from_usec(uint64_t usec)
+{
+ return usec * tsc_freq_mhz();
+}
void boot_with_psp_timestamp(uint64_t base_timestamp)
{
@@ -20,14 +33,14 @@ void boot_with_psp_timestamp(uint64_t base_timestamp)
* info->timestamp is PSP's timestamp (in microseconds)
* when x86 processor is released.
*/
- uint64_t psp_last_ts = info->timestamp;
+ uint64_t psp_last_ts_usec = info->timestamp;
int i;
struct timestamp_table *psp_ts_table =
(struct timestamp_table *)(void *)
((uintptr_t)_transfer_buffer + info->timestamp_offset);
/* new base_timestamp will be offset for all PSP timestamps. */
- base_timestamp -= psp_last_ts;
+ base_timestamp -= timestamp_from_usec(psp_last_ts_usec);
for (i = 0; i < psp_ts_table->num_entries; i++) {
struct timestamp_entry *tse = &psp_ts_table->entries[i];
@@ -37,11 +50,12 @@ void boot_with_psp_timestamp(uint64_t base_timestamp)
* to make it absolute then add base_timestamp again since
* it'll be a new base_time.
*
- * We don't need to convert unit since both PSP and coreboot
- * will use 1us granularity.
- *
+ * Verstage on PSP uses a 1 microsecond timestamp granularity while the x86
+ * part of coreboot uses the TSC tick time as granularity, so this needs to be
+ * converted.
*/
- tse->entry_stamp += psp_ts_table->base_time + base_timestamp;
+ tse->entry_stamp += timestamp_from_usec(psp_ts_table->base_time) +
+ base_timestamp;
}
bootblock_main_with_timestamp(base_timestamp, psp_ts_table->entries,