diff options
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/cpu/Kconfig | 10 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 10 |
2 files changed, 0 insertions, 20 deletions
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 3dd1e33056..7f509653b8 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -29,16 +29,6 @@ config CBFS_CACHE_SIZE help The size of the cbfs_cache region. -config PAYLOAD_PRELOAD_CACHE_SIZE - hex - default 0x30000 - depends on PAYLOAD_PRELOAD - help - This config sets the size of the payload_preload_cache memory region. - It is used as the destination for the raw payload. This space is only - populated during non-S3, so it doesn't need to be reserved in the - EARLY_RESERVED_DRAM region. - endif # SOC_AMD_COMMON_BLOCK_NONCAR config SOC_AMD_COMMON_BLOCK_MCA_COMMON diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index a542b7d6ad..e42174f765 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -106,16 +106,6 @@ SECTIONS EARLY_RESERVED_DRAM_END(.) -#if CONFIG(PAYLOAD_PRELOAD) - /* - * This section is outside the early_reserved_dram section. We only read - * the payload on non-S3 boots, so we don't need to reserve it from the - * OS. The 64 byte alignment is required by the SPI DMA controller. - */ - . = ALIGN(ARCH_CACHELINE_ALIGN_SIZE); - REGION(payload_preload_cache, ., CONFIG_PAYLOAD_PRELOAD_CACHE_SIZE, ARCH_CACHELINE_ALIGN_SIZE) -#endif - RAMSTAGE(CONFIG_RAMBASE, 8M) } |