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-rw-r--r--src/soc/amd/common/block/data_fabric/data_fabric_helper.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c
index fe983aca7c..fb4b26c049 100644
--- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c
+++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c
@@ -47,13 +47,13 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui
void data_fabric_print_mmio_conf(void)
{
- uint32_t control;
+ union df_mmio_control control;
uint64_t base, limit;
printk(BIOS_SPEW,
"=== Data Fabric MMIO configuration registers ===\n"
- "idx control base limit\n");
+ "idx base limit control R W NP F-ID\n");
for (unsigned int i = 0; i < DF_MMIO_REG_SET_COUNT; i++) {
- control = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i));
+ control.raw = data_fabric_broadcast_read32(0, DF_MMIO_CONTROL(i));
/* Base and limit address registers don't contain the lower address bits, but
are shifted by D18F0_MMIO_SHIFT bits */
base = (uint64_t)data_fabric_broadcast_read32(0, DF_MMIO_BASE(i))
@@ -62,8 +62,12 @@ void data_fabric_print_mmio_conf(void)
<< D18F0_MMIO_SHIFT;
/* Lower D18F0_MMIO_SHIFT address limit bits are all 1 */
limit += (1 << D18F0_MMIO_SHIFT) - 1;
- printk(BIOS_SPEW, " %2u %8x %16llx %16llx\n",
- i, control, base, limit);
+ printk(BIOS_SPEW, " %2u %16llx %16llx %8x %s %s %s %4x\n",
+ i, base, limit, control.raw,
+ control.re ? "x" : " ",
+ control.we ? "x" : " ",
+ control.np ? "x" : " ",
+ control.fabric_id);
}
}