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-rw-r--r--src/soc/amd/common/block/acp/Kconfig2
-rw-r--r--src/soc/amd/common/block/include/amdblocks/psp_efs.h2
-rw-r--r--src/soc/amd/common/block/lpc/espi_def.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/acp/Kconfig b/src/soc/amd/common/block/acp/Kconfig
index df17f71057..e776416cf4 100644
--- a/src/soc/amd/common/block/acp/Kconfig
+++ b/src/soc/amd/common/block/acp/Kconfig
@@ -8,4 +8,4 @@ config SOC_AMD_COMMON_BLOCK_ACP_GEN2
bool
help
Select this option to perform Audio Co-Processor(ACP) configuration.
- Used by the ACP in AMD sabrina (family 17h) and possibly newer CPUs.
+ Used by the ACP in AMD mendocino (family 17h) and possibly newer CPUs.
diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h
index af44765519..1f93807538 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h
@@ -16,7 +16,7 @@
#elif CONFIG(SOC_AMD_PICASSO)
#define SPI_MODE_FIELD spi_readmode_f17_mod_00_2f
#define SPI_SPEED_FIELD spi_fastspeed_f17_mod_00_2f
-#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_SABRINA)
+#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO)
#define SPI_MODE_FIELD spi_readmode_f17_mod_30_3f
#define SPI_SPEED_FIELD spi_fastspeed_f17_mod_30_3f
#else
diff --git a/src/soc/amd/common/block/lpc/espi_def.h b/src/soc/amd/common/block/lpc/espi_def.h
index dc398a9fc2..1dacffcf51 100644
--- a/src/soc/amd/common/block/lpc/espi_def.h
+++ b/src/soc/amd/common/block/lpc/espi_def.h
@@ -25,7 +25,7 @@
#define ESPI_WDG_EN (1 << 0)
#define ESPI_GLOBAL_CONTROL_1 0x34
-#define ESPI_ALERT_ENABLE (1 << 20) /* Sabrina and later SoCs */
+#define ESPI_ALERT_ENABLE (1 << 20) /* Mendocino and later SoCs */
#define ESPI_RGCMD_INT_MAP_SHIFT 13
#define ESPI_RGCMD_INT_MAP_MASK (0x1f << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_RGCMD_INT(irq) ((irq) << ESPI_RGCMD_INT_MAP_SHIFT)