diff options
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/lpc/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/amd/common/block/lpc/espi_util.c | 5 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig index 64192695c6..125f8b326a 100644 --- a/src/soc/amd/common/block/lpc/Kconfig +++ b/src/soc/amd/common/block/lpc/Kconfig @@ -42,3 +42,11 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI help Select this option if mainboard uses eSPI instead of LPC (if supported by platform). + +config SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN + bool + depends on SOC_AMD_COMMON_BLOCK_USE_ESPI + help + SMU will lock up at times if the port80h enable bit is cleared. Select + this option to retain the port80 enable bit while clearing other enable + bits in the ESPI Decode register. diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index c61c61f8df..68d51f5ba0 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -139,7 +139,10 @@ static void espi_clear_decodes(void) unsigned int idx; /* First turn off all enable bits, then zero base, range, and size registers */ - espi_write16(ESPI_DECODE, 0); + if (CONFIG(SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN)) + espi_write16(ESPI_DECODE, (espi_read16(ESPI_DECODE) & ESPI_DECODE_IO_0x80_EN)); + else + espi_write16(ESPI_DECODE, 0); for (idx = 0; idx < ESPI_GENERIC_IO_WIN_COUNT; idx++) { espi_write16(espi_io_range_base_reg(idx), 0); |