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Diffstat (limited to 'src/soc/amd/common/block/spi/fch_spi.c')
-rw-r--r--src/soc/amd/common/block/spi/fch_spi.c29
1 files changed, 15 insertions, 14 deletions
diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index bf64c3f260..bac1452709 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -4,28 +4,30 @@
#include <amdblocks/lpc.h>
#include <amdblocks/spi.h>
#include <arch/mmio.h>
+#include <assert.h>
#include <console/console.h>
#include <soc/iomap.h>
#include <stdint.h>
-static uintptr_t fch_spi_base(void)
-{
- uintptr_t base;
-
- base = lpc_get_spibase();
+static uintptr_t spi_base;
- if (base)
- return base;
+void spi_set_base(void *base)
+{
+ spi_base = (uintptr_t)base;
+}
- lpc_set_spibase(SPI_BASE_ADDRESS);
- lpc_enable_spi_rom(SPI_ROM_ENABLE);
+uintptr_t spi_get_bar(void)
+{
+ if (ENV_X86 && !spi_base)
+ spi_set_base((void *)lpc_get_spibase());
+ ASSERT(spi_base);
- return SPI_BASE_ADDRESS;
+ return spi_base;
}
static void fch_spi_set_spi100(int norm, int fast, int alt, int tpm)
{
- uintptr_t base = fch_spi_base();
+ uintptr_t base = spi_get_bar();
write16((void *)(base + SPI100_SPEED_CONFIG), SPI_SPEED_CFG(norm, fast, alt, tpm));
write16((void *)(base + SPI100_ENABLE), SPI_USE_SPI100);
@@ -33,7 +35,7 @@ static void fch_spi_set_spi100(int norm, int fast, int alt, int tpm)
static void fch_spi_disable_4dw_burst(void)
{
- uintptr_t base = fch_spi_base();
+ uintptr_t base = spi_get_bar();
uint16_t val = read16((void *)(base + SPI100_HOST_PREF_CONFIG));
write16((void *)(base + SPI100_HOST_PREF_CONFIG), val & ~SPI_RD4DW_EN_HOST);
@@ -41,7 +43,7 @@ static void fch_spi_disable_4dw_burst(void)
static void fch_spi_set_read_mode(u32 mode)
{
- uintptr_t base = fch_spi_base();
+ uintptr_t base = spi_get_bar();
uint32_t val = read32((void *)(base + SPI_CNTRL0)) & ~SPI_READ_MODE_MASK;
write32((void *)(base + SPI_CNTRL0), val | SPI_READ_MODE(mode));
@@ -77,7 +79,6 @@ void fch_spi_config_modes(void)
void fch_spi_early_init(void)
{
- lpc_set_spibase(SPI_BASE_ADDRESS);
lpc_enable_spi_rom(SPI_ROM_ENABLE);
lpc_enable_spi_prefetch();
fch_spi_disable_4dw_burst();