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-rw-r--r--src/soc/amd/cezanne/Makefile.mk10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.mk b/src/soc/amd/cezanne/Makefile.mk
index 75abb9d7c7..adbf3a6d8e 100644
--- a/src/soc/amd/cezanne/Makefile.mk
+++ b/src/soc/amd/cezanne/Makefile.mk
@@ -95,6 +95,11 @@ ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
endif
+# type = 0x54
+# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM
+PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START)
+PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE)
+
# type = 0x55
SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
@@ -149,6 +154,9 @@ add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)),
OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base)
OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base)
+OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size)
+
OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -177,6 +185,8 @@ OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table)
AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
$(OPT_PSP_NVRAM_BASE) \
$(OPT_PSP_NVRAM_SIZE) \
+ $(OPT_PSP_RPMC_NVRAM_BASE) \
+ $(OPT_PSP_RPMC_NVRAM_SIZE) \
$(OPT_APOB_ADDR) \
$(OPT_DEBUG_AMDFWTOOL) \
$(OPT_PSP_BIOSBIN_FILE) \