diff options
Diffstat (limited to 'src/pc80')
-rw-r--r-- | src/pc80/Makefile.inc | 2 | ||||
-rw-r--r-- | src/pc80/i8259.c | 6 | ||||
-rw-r--r-- | src/pc80/mc146818rtc.c | 10 | ||||
-rw-r--r-- | src/pc80/mc146818rtc_early.c | 2 | ||||
-rw-r--r-- | src/pc80/serial.c | 6 |
5 files changed, 13 insertions, 13 deletions
diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc index 43190fd071..358c221856 100644 --- a/src/pc80/Makefile.inc +++ b/src/pc80/Makefile.inc @@ -1,6 +1,6 @@ obj-y += mc146818rtc.o obj-y += isa-dma.o -obj-y += i8259.o +obj-y += i8259.o obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o diff --git a/src/pc80/i8259.c b/src/pc80/i8259.c index 330b7c6428..66988753cf 100644 --- a/src/pc80/i8259.c +++ b/src/pc80/i8259.c @@ -75,7 +75,7 @@ void setup_i8259(void) outb(INT_VECTOR_MASTER | IRQ0, MASTER_PIC_ICW2); outb(INT_VECTOR_SLAVE | IRQ8, SLAVE_PIC_ICW2); - /* Now the interrupt controller expects us to write to ICW3. + /* Now the interrupt controller expects us to write to ICW3. * * The normal scenario is to set up cascading on IRQ2 on the master * i8259 and assign the slave ID 2 to the slave i8259. @@ -89,9 +89,9 @@ void setup_i8259(void) * operating as part of an x86 architecture based chipset */ outb(MICROPROCESSOR_MODE, MASTER_PIC_ICW2); - outb(MICROPROCESSOR_MODE, SLAVE_PIC_ICW2); + outb(MICROPROCESSOR_MODE, SLAVE_PIC_ICW2); - /* Now clear the interrupts through OCW1. + /* Now clear the interrupts through OCW1. * First we mask off all interrupts on the slave interrupt controller * then we mask off all interrupts but interrupt 2 on the master * controller. This way the cascading stays alife. diff --git a/src/pc80/mc146818rtc.c b/src/pc80/mc146818rtc.c index 4bee1cdffe..078bde273c 100644 --- a/src/pc80/mc146818rtc.c +++ b/src/pc80/mc146818rtc.c @@ -156,7 +156,7 @@ void rtc_init(int invalid) if (invalid || cmos_invalid || checksum_invalid) { printk(BIOS_WARNING, "RTC:%s%s%s zeroing cmos\n", - invalid?" Clear requested":"", + invalid?" Clear requested":"", cmos_invalid?" Power Problem":"", checksum_invalid?" Checksum invalid":""); #if 0 @@ -166,7 +166,7 @@ void rtc_init(int invalid) for(i = 10; i < 48; i++) { cmos_write(0, i); } - + if (cmos_invalid) { /* Now setup a default date of Sat 1 January 2000 */ cmos_write(0, 0x00); /* seconds */ @@ -218,7 +218,7 @@ static int get_cmos_value(unsigned long bit, unsigned long length, void *vret) unsigned long i; unsigned char uchar; - /* The table is checked when it is built to ensure all + /* The table is checked when it is built to ensure all values are valid. */ ret = vret; byte=bit/8; /* find the byte where the data starts */ @@ -248,7 +248,7 @@ int get_option(void *dest, const char *name) /* Figure out how long name is */ namelen = strnlen(name, CMOS_MAX_NAME_LENGTH); - + /* find the requested entry record */ ct=&option_table; ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length); @@ -263,7 +263,7 @@ int get_option(void *dest, const char *name) printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name); return(-2); } - + if(get_cmos_value(ce->bit, ce->length, dest)) return(-3); if(!rtc_checksum_valid(LB_CKS_RANGE_START, diff --git a/src/pc80/mc146818rtc_early.c b/src/pc80/mc146818rtc_early.c index 87fc3f0a61..fa1f388804 100644 --- a/src/pc80/mc146818rtc_early.c +++ b/src/pc80/mc146818rtc_early.c @@ -88,7 +88,7 @@ static inline int do_normal_boot(void) /* The RTC_BOOT_BYTE is now o.k. see where to go. */ byte = cmos_read(RTC_BOOT_BYTE); - + /* Are we in normal mode? */ if (byte & 1) { byte &= 0x0f; /* yes, clear the boot count */ diff --git a/src/pc80/serial.c b/src/pc80/serial.c index 837d112338..b4d0542824 100644 --- a/src/pc80/serial.c +++ b/src/pc80/serial.c @@ -53,14 +53,14 @@ static int uart_can_tx_byte(void) static void uart_wait_to_tx_byte(void) { - while(!uart_can_tx_byte()) + while(!uart_can_tx_byte()) ; } static void uart_wait_until_sent(void) { while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) - ; + ; } static void uart_tx_byte(unsigned char data) @@ -109,6 +109,6 @@ void uart_init(void) uart8250_init(CONFIG_TTYS0_BASE, ttys0_div, UART_LCS); #else uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV, UART_LCS); -#endif +#endif } #endif |