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-rw-r--r--src/northbridge/intel/nehalem/nehalem.h5
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h5
2 files changed, 2 insertions, 8 deletions
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index ebec63d898..493c5b14cd 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -249,17 +249,14 @@ typedef struct {
#define PCI_DEVICE_ID_SB 0x0104
#define PCI_DEVICE_ID_IB 0x0154
-#ifdef __SMM__
void intel_nehalem_finalize_smm(void);
-#else /* !__SMM__ */
+
int bridge_silicon_revision(void);
void nehalem_early_initialization(int chipset_type);
void nehalem_late_initialization(void);
void mainboard_pre_raminit(void);
void mainboard_get_spd_map(u8 *spd_addrmap);
-#endif /* !__SMM__ */
-
#endif
#endif
#endif /* __NORTHBRIDGE_INTEL_NEHALEM_NEHALEM_H__ */
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 8664c5d311..31d4358e7b 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -203,9 +203,8 @@ enum platform_type {
#ifndef __ASSEMBLER__
-#ifdef __SMM__
void intel_sandybridge_finalize_smm(void);
-#else /* !__SMM__ */
+
int bridge_silicon_revision(void);
void systemagent_early_init(void);
void sandybridge_init_iommu(void);
@@ -213,8 +212,6 @@ void sandybridge_late_initialization(void);
void northbridge_romstage_finalize(int s3resume);
void early_init_dmi(void);
-#endif /* !__SMM__ */
-
void pch_enable_lpc(void);
void mainboard_early_init(int s3resume);
void mainboard_config_superio(void);