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-rw-r--r--src/northbridge/amd/agesa/state_machine.c17
-rw-r--r--src/northbridge/amd/agesa/state_machine.h4
2 files changed, 20 insertions, 1 deletions
diff --git a/src/northbridge/amd/agesa/state_machine.c b/src/northbridge/amd/agesa/state_machine.c
index 3f61c584aa..7743603f0b 100644
--- a/src/northbridge/amd/agesa/state_machine.c
+++ b/src/northbridge/amd/agesa/state_machine.c
@@ -330,6 +330,7 @@ static void amd_bs_ramstage_init(void *arg)
if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT))
cbmem_initialize();
agesa_execute_state(cb, AMD_S3LATE_RESTORE);
+ fchs3earlyrestore(&cb->StdHeader);
}
}
@@ -351,8 +352,10 @@ static void amd_bs_post_device(void *arg)
{
struct sysinfo *cb = arg;
- if (acpi_is_wakeup_s3())
+ if (acpi_is_wakeup_s3()) {
+ fchs3laterestore(&cb->StdHeader);
return;
+ }
agesa_execute_state(cb, AMD_INIT_LATE);
@@ -386,3 +389,15 @@ void __attribute__((weak))
board_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env) { }
void __attribute__((weak))
board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid) { }
+
+AGESA_STATUS __attribute__((weak))
+fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader)
+{
+ return AGESA_SUCCESS;
+}
+
+AGESA_STATUS __attribute__((weak))
+fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader)
+{
+ return AGESA_SUCCESS;
+}
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h
index 3d8e53d3d4..f2551de5d9 100644
--- a/src/northbridge/amd/agesa/state_machine.h
+++ b/src/northbridge/amd/agesa/state_machine.h
@@ -38,6 +38,10 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock);
AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock);
#endif
+/* For FCH */
+AGESA_STATUS fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader);
+AGESA_STATUS fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader);
+
struct sysinfo
{
AMD_CONFIG_PARAMS StdHeader;