diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family10/northbridge.c | 11 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15/northbridge.c | 14 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 35 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 26 |
4 files changed, 53 insertions, 33 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 6d0b1b7b18..9f2555f78e 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -554,13 +554,14 @@ static void mcf0_control_init(struct device *dev) { } -static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) { unsigned nodeid; struct bus *link; unsigned sblink = sysconf.sblk; device_t io_hub = NULL; u32 next_unitid = 0xff; + unsigned int max = dev->bus->subordinate; nodeid = amdfam10_nodeid(dev); if (nodeid == 0) { @@ -576,7 +577,9 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) } } - return max; + dev->bus->subordinate = max; + + return unused; } static struct device_operations northbridge_operations = { @@ -913,7 +916,9 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) } for (link = dev->link_list; link; link = link->next) { - max = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, max); + link->secondary = dev->bus->subordinate; + link->subordinate = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, link->secondary); + dev->bus->subordinate = link->subordinate; } /* Tune the hypertransport transaction for best performance. diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index b2d8abd86c..a4f78f1e8b 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -459,12 +459,14 @@ static void nb_set_resources(device_t dev) } } -static unsigned scan_chains(device_t dev, unsigned max) +static unsigned scan_chains(device_t dev, unsigned unused) { unsigned nodeid; struct bus *link; device_t io_hub = NULL; u32 next_unitid = 0x18; + unsigned int max = dev->bus->subordinate; + nodeid = amdfam15_nodeid(dev); if (nodeid == 0) { for (link = dev->link_list; link; link = link->next) { @@ -479,7 +481,10 @@ static unsigned scan_chains(device_t dev, unsigned max) } } } - return max; + + dev->bus->subordinate = max; + + return unused; } @@ -948,8 +953,9 @@ static void domain_set_resources(device_t dev) /* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */ static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int max) { - max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max); - return max; + struct bus *link = dev->link_list; + link->subordinate = pci_scan_bus(link, PCI_DEVFN(0x18, 0), 0xff, link->secondary); + return link->subordinate; } static struct device_operations pci_domain_ops = { diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index a2124f0edc..121cdf201c 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -227,7 +227,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool max_bus = 0xfc; link->secondary = min_bus; - link->subordinate = max_bus; + link->subordinate = link->secondary; /* Read the existing primary/secondary/subordinate bus * number configuration. @@ -245,7 +245,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool /* set the config map space */ - set_config_map_reg(nodeid, link->link_num, ht_c_index, link->secondary, link->subordinate, sysconf.segbit, sysconf.nodes); + set_config_map_reg(nodeid, link->link_num, ht_c_index, link->secondary, max_bus, sysconf.segbit, sysconf.nodes); /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link @@ -263,16 +263,11 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(is_sblink)); /* Now that nothing is overlapping it is safe to scan the children. */ - max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, max); + link->subordinate = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, link->secondary); /* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value */ - if(ht_c_index>3) { // clear the extend reg - clear_config_map_reg(nodeid, link->link_num, ht_c_index, (max+1)>>sysconf.segbit, (link->subordinate)>>sysconf.segbit, sysconf.nodes); - } - - link->subordinate = max; set_config_map_reg(nodeid, link->link_num, ht_c_index, link->secondary, link->subordinate, sysconf.segbit, sysconf.nodes); sysconf.ht_c_num++; @@ -286,15 +281,16 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool sysconf.hcdn_reg[ht_c_index] = temp; } - store_ht_c_conf_bus(nodeid, link->link_num, ht_c_index, link->secondary, link->subordinate, &sysconf); - return max; + store_ht_c_conf_bus(nodeid, link->link_num, ht_c_index, link->secondary, link->subordinate, &sysconf); + return link->subordinate; } -static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static unsigned amdfam10_scan_chains(device_t dev, unsigned unused) { unsigned nodeid; struct bus *link; unsigned sblink = sysconf.sblk; + unsigned int max = dev->bus->subordinate; nodeid = amdfam10_nodeid(dev); @@ -312,7 +308,10 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max); } - return max; + + dev->bus->subordinate = max; + + return unused; } @@ -913,7 +912,7 @@ static void amdfam10_domain_set_resources(device_t dev) } } -static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) +static u32 amdfam10_domain_scan_bus(device_t dev, u32 unused) { u32 reg; int i; @@ -924,7 +923,9 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) } for(link = dev->link_list; link; link = link->next) { - max = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, max); + link->secondary = dev->bus->subordinate; + link->subordinate = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, link->secondary); + dev->bus->subordinate = link->subordinate; } /* Tune the hypertransport transaction for best performance. @@ -948,7 +949,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return max; + return unused; } #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) @@ -1213,7 +1214,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; } -static u32 cpu_bus_scan(device_t dev, u32 max) +static u32 cpu_bus_scan(device_t dev, u32 passthru) { struct bus *cpu_bus; device_t dev_mc; @@ -1382,7 +1383,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) amd_cpu_topology(cpu, i, j); } //j } - return max; + return passthru; } static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 29cc5edb77..51e1e2d695 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -171,7 +171,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ max_bus = 0xff; link->secondary = min_bus; - link->subordinate = max_bus; + link->subordinate = link->secondary; /* Read the existing primary/secondary/subordinate bus * number configuration. @@ -186,7 +186,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ busses &= 0xff000000; busses |= (((unsigned int)(dev->bus->secondary) << 0) | ((unsigned int)(link->secondary) << 8) | - ((unsigned int)(link->subordinate) << 16)); + (max_bus << 16)); pci_write_config32(dev, link->cap + 0x14, busses); config_busses &= 0x000fc88; @@ -195,7 +195,7 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ (( nodeid & 7) << 4) | ((link->link_num & 3) << 8) | ((link->secondary) << 16) | - ((link->subordinate) << 24); + (max_bus << 24); f1_write_config32(config_reg, config_busses); /* Now we can scan all of the subordinate busses i.e. the @@ -213,12 +213,11 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ next_unitid = hypertransport_scan_chain(link, 0, max_devfn, ht_unitid_base, offset_unit_id(is_sblink)); /* Now that nothing is overlapping it is safe to scan the children. */ - max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, max); + link->subordinate = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, link->secondary); /* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value */ - link->subordinate = max; busses = (busses & 0xff00ffff) | ((unsigned int) (link->subordinate) << 16); pci_write_config32(dev, link->cap + 0x14, busses); @@ -239,14 +238,15 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_ sysconf.hcdn_reg[index] = temp; } - return max; + return link->subordinate; } -static unsigned amdk8_scan_chains(device_t dev, unsigned max) +static unsigned amdk8_scan_chains(device_t dev, unsigned unused) { unsigned nodeid; struct bus *link; unsigned sblink = 0; + unsigned int max = dev->bus->subordinate; nodeid = amdk8_nodeid(dev); if (nodeid == 0) @@ -266,7 +266,10 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max) max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max); } - return max; + + dev->bus->subordinate = max; + + return unused; } @@ -1096,11 +1099,16 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max) { u32 reg; int i; + struct bus *link = dev->link_list; + /* Unmap all of the HT chains */ for(reg = 0xe0; reg <= 0xec; reg += 4) { f1_write_config32(reg, 0); } - max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max); + + link->secondary = dev->bus->subordinate; + link->subordinate = pci_scan_bus(link, PCI_DEVFN(0x18, 0), 0xff, link->secondary); + dev->bus->subordinate = link->subordinate; /* Tune the hypertransport transaction for best performance. * Including enabling relaxed ordering if it is safe. |