diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdk8/debug.c | 10 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit_f_dqs.c | 4 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/cn700.h | 3 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/northbridge.c | 4 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/vga.c | 4 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/vgabios.c | 29 |
7 files changed, 26 insertions, 32 deletions
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c index ff2f347af1..97ca25577c 100644 --- a/src/northbridge/amd/amdk8/debug.c +++ b/src/northbridge/amd/amdk8/debug.c @@ -20,7 +20,7 @@ static void print_debug_pci_dev(unsigned dev) printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); } -static void print_pci_devices(void) +static inline void print_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -63,7 +63,7 @@ static void dump_pci_device(unsigned dev) #if CONFIG_K8_REV_F_SUPPORT == 1 static uint32_t pci_read_config32_index_wait(device_t dev, uint32_t index_reg, uint32_t index); -static void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg) +static inline void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg) { int i; print_debug_pci_dev(dev); @@ -109,7 +109,7 @@ static void dump_pci_devices(void) } } -static void dump_pci_devices_on_bus(unsigned busn) +static inline void dump_pci_devices_on_bus(unsigned busn) { device_t dev; for(dev = PCI_DEV(busn, 0, 0); @@ -208,7 +208,7 @@ static void dump_smbus_registers(void) } #endif -static void dump_io_resources(unsigned port) +static inline void dump_io_resources(unsigned port) { int i; @@ -228,7 +228,7 @@ static void dump_io_resources(unsigned port) } } -static void dump_mem(unsigned start, unsigned end) +static inline void dump_mem(unsigned start, unsigned end) { unsigned i; print_debug("dump_mem:"); diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index c38d1595ae..e34187154c 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -1690,7 +1690,7 @@ static unsigned convert_to_linear(unsigned value) static const uint8_t latency_indicies[] = { 25, 23, 9 }; -int find_optimum_spd_latency(u32 spd_device, unsigned *min_latency, unsigned *min_cycle_time) +static int find_optimum_spd_latency(u32 spd_device, unsigned *min_latency, unsigned *min_cycle_time) { int new_cycle_time, new_latency; int index; @@ -1938,7 +1938,7 @@ static unsigned convert_to_1_4(unsigned value) return valuex; } -int get_dimm_Trc_clocks(u32 spd_device, const struct mem_param *param) +static int get_dimm_Trc_clocks(u32 spd_device, const struct mem_param *param) { int value; int value2; diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c index 4e402e6d7a..3372474ac5 100644 --- a/src/northbridge/amd/amdk8/raminit_f_dqs.c +++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c @@ -125,7 +125,7 @@ static inline void write_cr4(unsigned long cr4) } -static inline void enable_sse2() +static inline void enable_sse2(void) { unsigned long cr4; cr4 = read_cr4(); @@ -133,7 +133,7 @@ static inline void enable_sse2() write_cr4(cr4); } -static inline void disable_sse2() +static inline void disable_sse2(void) { unsigned long cr4; cr4 = read_cr4(); diff --git a/src/northbridge/via/cn700/cn700.h b/src/northbridge/via/cn700/cn700.h index df139cef35..8ffe44c8d9 100644 --- a/src/northbridge/via/cn700/cn700.h +++ b/src/northbridge/via/cn700/cn700.h @@ -19,7 +19,8 @@ */ #if !defined (__PRE_RAM__) -static void cn700_noop() +// HACK +static inline void cn700_noop(device_t dev) { } #endif diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index ad8c42d841..445ecf2780 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -202,7 +202,7 @@ static void pci_domain_set_resources(device_t dev) assign_resources(&dev->link[0]); } -static const struct device_operations pci_domain_ops = { +static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .enable_resources = enable_childrens_resources, @@ -219,7 +219,7 @@ static void cpu_bus_noop(device_t dev) { } -static const struct device_operations cpu_bus_ops = { +static struct device_operations cpu_bus_ops = { .read_resources = cpu_bus_noop, .set_resources = cpu_bus_noop, .enable_resources = cpu_bus_noop, diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index 283f23dd16..789dbfb480 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -52,7 +52,7 @@ static void vga_init(device_t dev) * Copy BOCHS BIOS from 4G-CONFIG_ROM_SIZE-64k (in flash) to 0xf0000 (in RAM) * This is for compatibility with the VGA ROM's BIOS callbacks. */ - memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000); + memcpy((void *)0xf0000, (const void *)(0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000); printk(BIOS_DEBUG, "Initializing VGA\n"); @@ -98,7 +98,7 @@ static void vga_init(device_t dev) outb(reg8, SR_DATA); /* Clear the BOCHS BIOS out of memory, so it doesn't confuse Linux. */ - memset(0xf0000, 0, 0x10000); + memset((void *)0xf0000, 0, 0x10000); } static const struct device_operations vga_operations = { diff --git a/src/northbridge/via/cn700/vgabios.c b/src/northbridge/via/cn700/vgabios.c index c9a6404f99..83ca814eeb 100644 --- a/src/northbridge/via/cn700/vgabios.c +++ b/src/northbridge/via/cn700/vgabios.c @@ -4,7 +4,7 @@ #include <device/pci_ops.h> #undef __KERNEL__ #include <arch/io.h> -//#include <printk.h> +#include <stddef.h> #include <string.h> #include "vgachip.h" #include <cbfs.h> @@ -176,6 +176,7 @@ static void real_mode_switch_call_vga(unsigned long devfn) /* put the stack at the end of page zero. * that way we can easily share it between real and protected, * since the 16-bit ESP at segment 0 will work for any case. + */ /* Setup a stack */ " mov $0x0, %ax \n" " mov %ax, %ss \n" @@ -271,6 +272,7 @@ void vga_enable_console() /* put the stack at the end of page zero. * that way we can easily share it between real and protected, * since the 16-bit ESP at segment 0 will work for any case. + */ /* Setup a stack */ " mov $0x0, %ax \n" " mov %ax, %ss \n" @@ -336,7 +338,7 @@ void do_vgabios(void) { device_t dev; unsigned long busdevfn; - unsigned int rom = 0; + unsigned char *rom; unsigned char *buf; unsigned int size = 64*1024; int i; @@ -357,9 +359,9 @@ void do_vgabios(void) /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); - pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); - printk(BIOS_DEBUG, "rom base, size: %x\n", rom); + rom = cbfs_load_optionrom(dev->vendor, dev->device, NULL); + pci_write_config32(dev, PCI_ROM_ADDRESS, (u32)rom | 1); + printk(BIOS_DEBUG, "rom base: %p\n", rom); buf = (unsigned char *) rom; if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { @@ -635,7 +637,7 @@ void setup_realmode_idt(void) // and get it that way. But that's really disgusting. for (i = 0; i < 256; i++) { idts[i].cs = 0; - codeptr = (char*) 4096 + i * codesize; + codeptr = (unsigned char*) 4096 + i * codesize; idts[i].offset = (unsigned) codeptr; memcpy(codeptr, &idthandle, codesize); intbyte = codeptr + 3; @@ -648,7 +650,7 @@ void setup_realmode_idt(void) // int10. // calling convention here is the same as INTs, we can reuse // the int entry code. - codeptr = (char*) 0xff065; + codeptr = (unsigned char*) 0xff065; memcpy(codeptr, &idthandle, codesize); intbyte = codeptr + 3; *intbyte = 0x42; /* int42 is the relocated int10 */ @@ -657,7 +659,7 @@ void setup_realmode_idt(void) TF bit is set upon call to real mode */ idts[1].cs = 0; idts[1].offset = 16384; - memcpy(16384, &debughandle, &end_debughandle - &debughandle); + memcpy((void *)16384, &debughandle, &end_debughandle - &debughandle); } @@ -687,16 +689,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, unsigned long *pecx, unsigned long *peax, unsigned long *pflags) { - unsigned long edi = *pedi; - unsigned long esi = *pesi; - unsigned long ebp = *pebp; - unsigned long esp = *pesp; - unsigned long ebx = *pebx; - unsigned long edx = *pedx; - unsigned long ecx = *pecx; - unsigned long eax = *peax; - unsigned long flags = *pflags; - unsigned short func = (unsigned short) eax; + unsigned short func = (unsigned short) (*peax); int retval = 0; unsigned short devid, vendorid, devfn; short devindex; /* Use short to get rid of garbage in upper half of 32-bit register */ |