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-rw-r--r--src/northbridge/via/cn400/vga.c29
-rw-r--r--src/northbridge/via/cn700/vga.c29
-rw-r--r--src/northbridge/via/cx700/vga.c33
-rw-r--r--src/northbridge/via/vt8623/vga.c29
-rw-r--r--src/northbridge/via/vx800/vga.c37
5 files changed, 81 insertions, 76 deletions
diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c
index fa598aa8fa..d8c921af89 100644
--- a/src/northbridge/via/cn400/vga.c
+++ b/src/northbridge/via/cn400/vga.c
@@ -36,41 +36,42 @@
#include <arch/interrupt.h>
#include "northbridge.h"
#include "cn400.h"
+#include <x86emu/regs.h>
-static int via_cn400_int15_handler(struct eregs *regs)
+static int via_cn400_int15_handler(void)
{
int res=0;
printk(BIOS_DEBUG, "via_cn400_int15_handler\n");
- switch(regs->eax & 0xffff) {
+ switch(X86_EAX & 0xffff) {
case 0x5f19:
break;
case 0x5f18:
- regs->eax=0x5f;
- regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
- regs->ecx=0x060;
+ X86_EAX=0x5f;
+ X86_EBX=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
+ X86_ECX=0x060;
res=1;
break;
case 0x5f00:
- regs->eax = 0x8600;
+ X86_EAX = 0x8600;
break;
case 0x5f01:
- regs->eax = 0x5f;
- regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
+ X86_EAX = 0x5f;
+ X86_ECX = (X86_ECX & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 1;
break;
case 0x5f02:
- regs->eax=0x5f;
- regs->ebx= (regs->ebx & 0xffff0000) | 2;
- regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
- regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default
+ X86_EAX=0x5f;
+ X86_EBX= (X86_EBX & 0xffff0000) | 2;
+ X86_ECX= (X86_ECX & 0xffff0000) | 0x401; // PAL + crt only
+ X86_EDX= (X86_EDX & 0xffff0000) | 0; // TV Layout - default
res=1;
break;
case 0x5f0f:
- regs->eax=0x860f;
+ X86_EAX=0x860f;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
- regs->eax & 0xffff);
+ X86_EAX & 0xffff);
break;
}
return res;
diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c
index c23145976a..0f96b2cbbf 100644
--- a/src/northbridge/via/cn700/vga.c
+++ b/src/northbridge/via/cn700/vga.c
@@ -36,41 +36,42 @@
#include <arch/interrupt.h>
#include "northbridge.h"
#include "cn700.h"
+#include <x86emu/regs.h>
-static int via_cn700_int15_handler(struct eregs *regs)
+static int via_cn700_int15_handler(void)
{
int res=0;
printk(BIOS_DEBUG, "via_cn700_int15_handler\n");
- switch(regs->eax & 0xffff) {
+ switch(X86_EAX & 0xffff) {
case 0x5f19:
break;
case 0x5f18:
- regs->eax=0x5f;
- regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
- regs->ecx=0x060;
+ X86_EAX=0x5f;
+ X86_EBX=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
+ X86_ECX=0x060;
res=1;
break;
case 0x5f00:
- regs->eax = 0x8600;
+ X86_EAX = 0x8600;
break;
case 0x5f01:
- regs->eax = 0x5f;
- regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
+ X86_EAX = 0x5f;
+ X86_ECX = (X86_ECX & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 1;
break;
case 0x5f02:
- regs->eax=0x5f;
- regs->ebx= (regs->ebx & 0xffff0000) | 2;
- regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
- regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default
+ X86_EAX=0x5f;
+ X86_EBX= (X86_EBX & 0xffff0000) | 2;
+ X86_ECX= (X86_ECX & 0xffff0000) | 0x401; // PAL + crt only
+ X86_EDX= (X86_EDX & 0xffff0000) | 0; // TV Layout - default
res=1;
break;
case 0x5f0f:
- regs->eax=0x860f;
+ X86_EAX=0x860f;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
- regs->eax & 0xffff);
+ X86_EAX & 0xffff);
break;
}
return res;
diff --git a/src/northbridge/via/cx700/vga.c b/src/northbridge/via/cx700/vga.c
index 658535d6aa..6b60354dd1 100644
--- a/src/northbridge/via/cx700/vga.c
+++ b/src/northbridge/via/cx700/vga.c
@@ -31,6 +31,7 @@
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "registers.h"
+#include <x86emu/regs.h>
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/realmode/x86.h>
#endif
@@ -44,7 +45,7 @@
#define CRTC_INDEX 0x3d4
#define CRTC_DATA 0x3d5
-static int via_cx700_int15_handler(struct eregs *regs)
+static int via_cx700_int15_handler(void)
{
int res=0;
u8 mem_speed;
@@ -67,62 +68,62 @@ static int via_cx700_int15_handler(struct eregs *regs)
printk(BIOS_DEBUG, "via_cx700_int15_handler\n");
- switch(regs->eax & 0xffff) {
+ switch(X86_EAX & 0xffff) {
case 0x5f00: /* VGA POST Initialization Signal */
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
res = 1;
break;
case 0x5f01: /* Software Panel Type Configuration */
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
// panel type = 2 = 1024 * 768
- regs->ecx = (regs->ecx & 0xffffff00 ) | 2;
+ X86_ECX = (X86_ECX & 0xffffff00 ) | 2;
res = 1;
break;
case 0x5f27: /* Boot Device Selection */
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
- regs->ebx = 0x00000000; // 0 -> default
- regs->ecx = 0x00000000; // 0 -> default
+ X86_EBX = 0x00000000; // 0 -> default
+ X86_ECX = 0x00000000; // 0 -> default
// TV Layout - default
- regs->edx = (regs->edx & 0xffffff00) | 0;
+ X86_EDX = (X86_EDX & 0xffffff00) | 0;
res=1;
break;
case 0x5f0b: /* Get Expansion Setting */
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
- regs->ecx = regs->ecx & 0xffffff00; // non-expansion
+ X86_ECX = X86_ECX & 0xffffff00; // non-expansion
// regs->ecx = regs->ecx & 0xffffff00 | 1; // expansion
res=1;
break;
case 0x5f0f: /* VGA Post Completion */
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
res=1;
break;
case 0x5f18:
- regs->eax = (regs->eax & 0xffff0000 ) | 0x5f;
+ X86_EAX = (X86_EAX & 0xffff0000 ) | 0x5f;
#define UMA_SIZE_8MB (3 << 0)
#define UMA_SIZE_16MB (4 << 0)
#define UMA_SIZE_32MB (5 << 0)
- regs->ebx = (regs->ebx & 0xffff0000 ) | MEMORY_SPEED_533MHZ | UMA_SIZE_32MB;
+ X86_EBX = (X86_EBX & 0xffff0000 ) | MEMORY_SPEED_533MHZ | UMA_SIZE_32MB;
mem_speed = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 4)), SCRATCH_DRAM_FREQ);
if (mem_speed > 5)
mem_speed = 5;
- regs->ebx |= memory_mapping[mem_speed];
+ X86_EBX |= memory_mapping[mem_speed];
res=1;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
- regs->eax & 0xffff);
+ X86_EAX & 0xffff);
break;
}
return res;
diff --git a/src/northbridge/via/vt8623/vga.c b/src/northbridge/via/vt8623/vga.c
index 8e9bd6de34..954ff47873 100644
--- a/src/northbridge/via/vt8623/vga.c
+++ b/src/northbridge/via/vt8623/vga.c
@@ -30,44 +30,45 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
+#include <x86emu/regs.h>
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/realmode/x86.h>
#endif
-static int via_vt8623_int15_handler(struct eregs *regs)
+static int via_vt8623_int15_handler(void)
{
int res=0;
printk(BIOS_DEBUG, "via_vt8623_int15_handler\n");
- switch(regs->eax & 0xffff) {
+ switch(X86_EAX & 0xffff) {
case 0x5f19:
break;
case 0x5f18:
- regs->eax=0x5f;
- regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
- regs->ecx=0x060;
+ X86_EAX=0x5f;
+ X86_EBX=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
+ X86_ECX=0x060;
res=1;
break;
case 0x5f00:
- regs->eax = 0x8600;
+ X86_EAX = 0x8600;
break;
case 0x5f01:
- regs->eax = 0x5f;
- regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
+ X86_EAX = 0x5f;
+ X86_ECX = (X86_ECX & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 1;
break;
case 0x5f02:
- regs->eax=0x5f;
- regs->ebx= (regs->ebx & 0xffff0000) | 2;
- regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
- regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default
+ X86_EAX=0x5f;
+ X86_EBX= (X86_EBX & 0xffff0000) | 2;
+ X86_ECX= (X86_ECX & 0xffff0000) | 0x401; // PAL + crt only
+ X86_EDX= (X86_EDX & 0xffff0000) | 0; // TV Layout - default
res=1;
break;
case 0x5f0f:
- regs->eax=0x860f;
+ X86_EAX=0x860f;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
- regs->eax & 0xffff);
+ X86_EAX & 0xffff);
break;
}
return res;
diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c
index be522f884c..319dbda7de 100644
--- a/src/northbridge/via/vx800/vga.c
+++ b/src/northbridge/via/vx800/vga.c
@@ -33,6 +33,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
+#include <x86emu/regs.h>
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/realmode/x86.h>
#endif
@@ -50,14 +51,14 @@
#define VIACONFIG_VGA_PCI_10 0xf8000008
#define VIACONFIG_VGA_PCI_14 0xfc000000
-static int via_vx800_int15_handler(struct eregs *regs)
+static int via_vx800_int15_handler(void)
{
int res=0;
printk(BIOS_DEBUG, "via_vx800_int15_handler\n");
- switch(regs->eax & 0xffff) {
+ switch(X86_EAX & 0xffff) {
case 0x5f19:
- regs->eax=0x5f;
- regs->ecx=0x03;
+ X86_EAX=0x5f;
+ X86_ECX=0x03;
res=1;
break;
case 0x5f18:
@@ -84,44 +85,44 @@ static int via_vx800_int15_handler(struct eregs *regs)
i = (i & 0x70);
i = i >> 4;
if (i == 0) {
- regs->eax = 0x00; //not support 5f18
+ X86_EAX = 0x00; //not support 5f18
break;
}
i = i + 2;
- regs->ebx = (u32) i;
+ X86_EBX = (u32) i;
i = pci_read_config8(dev, 0x90);
i = (i & 0x07);
i = i + 3;
i = i << 4;
- regs->ebx = regs->ebx + ((u32) i);
- regs->eax = 0x5f;
+ X86_EBX = X86_EBX + ((u32) i);
+ X86_EAX = 0x5f;
res = 1;
break;
}
case 0x5f00:
- regs->eax = 0x005f;
+ X86_EAX = 0x005f;
res = 1;
break;
case 0x5f01:
- regs->eax = 0x5f;
- regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
+ X86_EAX = 0x5f;
+ X86_ECX = (X86_ECX & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 1;
break;
case 0x5f02:
- regs->eax=0x5f;
- regs->ebx= (regs->ebx & 0xffff0000) | 2;
- regs->ecx= (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
- regs->edx= (regs->edx & 0xffff0000) | 0; // TV Layout - default
+ X86_EAX=0x5f;
+ X86_EBX= (X86_EBX & 0xffff0000) | 2;
+ X86_ECX= (X86_ECX & 0xffff0000) | 0x401; // PAL + crt only
+ X86_EDX= (X86_EDX & 0xffff0000) | 0; // TV Layout - default
res=1;
break;
case 0x5f0f:
- regs->eax = 0x005f;
+ X86_EAX = 0x005f;
res = 1;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
- regs->eax & 0xffff);
- regs->eax = 0;
+ X86_EAX & 0xffff);
+ X86_EAX = 0;
break;
}
return res;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 00:48:46 +0000