diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/BiosCallOuts.h | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/oem_s3.c | 7 |
2 files changed, 7 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa/BiosCallOuts.h b/src/northbridge/amd/agesa/BiosCallOuts.h index 64f1cd5e9e..cfe1852fd4 100644 --- a/src/northbridge/amd/agesa/BiosCallOuts.h +++ b/src/northbridge/amd/agesa/BiosCallOuts.h @@ -30,13 +30,11 @@ #define BIOS_HEAP_START_ADDRESS 0x010000000 #define BIOS_HEAP_SIZE 0x30000 -#define BSP_STACK_BASE_ADDR 0x30000 #else #define BIOS_HEAP_START_ADDRESS 0x10000 /* HEAP during cold boot */ #define BIOS_HEAP_SIZE 0x20000 -#define BSP_STACK_BASE_ADDR 0x30000 #endif diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c index 08f68e58b4..779e28b553 100644 --- a/src/northbridge/amd/agesa/oem_s3.c +++ b/src/northbridge/amd/agesa/oem_s3.c @@ -20,6 +20,7 @@ #include <spi-generic.h> #include <spi_flash.h> #include <string.h> +#include <cbmem.h> #include <cpu/amd/agesa/s3_resume.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/agesawrapper.h> @@ -133,6 +134,12 @@ AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams) u32 MTRRStorageSize = 0; u32 pos, size; + if (HIGH_ROMSTAGE_STACK_SIZE) + cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE); + + if (HIGH_MEMORY_SCRATCH) + cbmem_add(CBMEM_ID_RESUME_SCRATCH, HIGH_MEMORY_SCRATCH); + /* To be consumed in AmdInitResume. */ get_s3nv_data(S3DataTypeNonVolatile, &pos, &size); if (size && dataBlock->NvStorageSize) |