diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/romstage.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c index 39babf5336..5b025eba24 100644 --- a/src/northbridge/intel/haswell/romstage.c +++ b/src/northbridge/intel/haswell/romstage.c @@ -51,7 +51,7 @@ void mainboard_romstage_entry(void) .dmibar = (uintptr_t)DEFAULT_DMIBAR, .epbar = DEFAULT_EPBAR, .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, - .smbusbar = SMBUS_IO_BASE, + .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE, .hpet_address = HPET_ADDR, .rcba = (uintptr_t)DEFAULT_RCBA, .pmbase = DEFAULT_PMBASE, diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 1ec54b328e..e1fe7c827b 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -251,7 +251,7 @@ static void southbridge_fill_pei_data(struct pei_data *pei_data) { const struct device *dev = pcidev_on_root(0x19, 0); - pei_data->smbusbar = SMBUS_IO_BASE; + pei_data->smbusbar = CONFIG_FIXED_SMBUS_IO_BASE; pei_data->wdbbar = 0x04000000; pei_data->wdbsize = 0x1000; pei_data->rcba = (uintptr_t)DEFAULT_RCBABASE; |