diff options
Diffstat (limited to 'src/northbridge')
21 files changed, 32 insertions, 32 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 9700ff727d..30755d13bc 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -3,8 +3,8 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index e861b9804d..5a2f266fde 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -3,8 +3,8 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 7852b5eb3a..dd07aa5463 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -3,8 +3,8 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 1ead42c92e..5d832eaf4b 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -3,7 +3,7 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> @@ -18,7 +18,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index e3d753a93d..8bb64b761a 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -3,7 +3,7 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> @@ -18,7 +18,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index fa49fc934e..74fd8c61b1 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -4,8 +4,8 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> -#include <arch/acpi_ivrs.h> +#include <acpi/acpi.h> +#include <acpi/acpi_ivrs.h> #include <arch/ioapic.h> #include <stdint.h> #include <device/device.h> @@ -22,7 +22,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <southbridge/amd/pi/hudson/pci_devs.h> diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index 03230a53ae..e8944669a3 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <device/pci_ops.h> #include <stdint.h> diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index bdd0ed0822..c81d21f0d0 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -3,8 +3,8 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 5f6c8a1c4f..d566120827 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/intel/smm_reloc.h> #include "chip.h" diff --git a/src/northbridge/intel/gm45/romstage.c b/src/northbridge/intel/gm45/romstage.c index 5b68a7398a..9bfb4e99bb 100644 --- a/src/northbridge/intel/gm45/romstage.c +++ b/src/northbridge/intel/gm45/romstage.c @@ -5,7 +5,7 @@ #include <romstage_handoff.h> #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/lapic.h> #include <arch/romstage.h> #include <northbridge/intel/gm45/gm45.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index f4d9d65421..a66847d6a9 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -3,7 +3,7 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci_ops.h> #include "haswell.h" diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index f7c6883852..552f032de5 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -3,7 +3,7 @@ #include <commonlib/helpers.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <delay.h> #include <cpu/intel/haswell/haswell.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index e1258e04aa..1c7eabcb57 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -2,8 +2,8 @@ /* This file is part of the coreboot project. */ #include <types.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include <device/pci_ops.h> #include "i945.h" diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 3fd3db69df..c080d0cbd5 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -8,7 +8,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/intel/smm_reloc.h> #include "i945.h" diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index c1ee207bf1..7384223c0d 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ops.h> #include <stdint.h> #include <delay.h> diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c index 54c42cf481..cf91f1ea65 100644 --- a/src/northbridge/intel/pineview/acpi.c +++ b/src/northbridge/intel/pineview/acpi.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpigen.h> -#include <arch/acpi.h> +#include <acpi/acpigen.h> +#include <acpi/acpi.h> #include <device/device.h> #include <northbridge/intel/pineview/pineview.h> #include <types.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index b24356361f..af4bfb8ef5 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <northbridge/intel/pineview/pineview.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 77aa8149da..3ae44b8b36 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -4,7 +4,7 @@ #include <types.h> #include <console/console.h> #include <commonlib/helpers.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/device.h> #include <device/pci_ops.h> #include "sandybridge.h" diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index ea2a737c2c..e947bc5613 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ops.h> #include <stdint.h> #include <delay.h> diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index fb1ebab753..67fc93334b 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -3,8 +3,8 @@ #include <types.h> #include <console/console.h> -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <device/device.h> #include "x4x.h" diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 054d2aa2ed..8aab1f63bd 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include <stdint.h> #include <device/device.h> #include <boot/tables.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/chip.h> #include <northbridge/intel/x4x/x4x.h> |