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-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index e726b33150..0718477872 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -3642,6 +3642,7 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat,
u8 devwidth;
u16 DimmSlots;
u8 byte = 0, bytex;
+ uint8_t crc_status;
/* preload data structure with addrs */
mctGet_DIMMAddr(pDCTstat, pDCTstat->Node_ID);
@@ -3662,10 +3663,20 @@ static u8 DIMMPresence_D(struct MCTStatStruc *pMCTstat,
int status;
smbaddr = Get_DIMMAddress_D(pDCTstat, i);
status = mctRead_SPD(smbaddr, SPD_ByteUse);
+ if (status >= 0) {
+ /* Verify result */
+ status = mctRead_SPD(smbaddr, SPD_ByteUse);
+ }
if (status >= 0) { /* SPD access is ok */
pDCTstat->DIMMPresent |= 1 << i;
read_spd_bytes(pMCTstat, pDCTstat, i);
- if (crcCheck(pDCTstat, i)) { /* CRC is OK */
+ crc_status = crcCheck(pDCTstat, i);
+ if (!crc_status) {
+ /* Try again in case there was a transient glitch */
+ read_spd_bytes(pMCTstat, pDCTstat, i);
+ crc_status = crcCheck(pDCTstat, i);
+ }
+ if (crc_status) { /* CRC is OK */
byte = pDCTstat->spd_data.spd_bytes[i][SPD_TYPE];
if (byte == JED_DDR3SDRAM) {
/*Dimm is 'Present'*/