diff options
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/fsp_rangeley/Makefile.inc | 2 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_sandybridge/Makefile.inc | 2 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/Makefile.inc | 2 | ||||
-rw-r--r-- | src/northbridge/intel/nehalem/Makefile.inc | 2 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/Makefile.inc b/src/northbridge/intel/fsp_rangeley/Makefile.inc index eaa1a77e88..3b88913452 100644 --- a/src/northbridge/intel/fsp_rangeley/Makefile.inc +++ b/src/northbridge/intel/fsp_rangeley/Makefile.inc @@ -28,7 +28,7 @@ ramstage-y += acpi.c ramstage-y += port_access.c romstage-y += raminit.c -romstage-y += ../../../arch/x86/lib/walkcbfs.S +romstage-y += ../../../arch/x86/walkcbfs.S romstage-y += port_access.c smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c diff --git a/src/northbridge/intel/fsp_sandybridge/Makefile.inc b/src/northbridge/intel/fsp_sandybridge/Makefile.inc index 42c16fa6ca..6c5e09f9b4 100644 --- a/src/northbridge/intel/fsp_sandybridge/Makefile.inc +++ b/src/northbridge/intel/fsp_sandybridge/Makefile.inc @@ -31,7 +31,7 @@ romstage-y += raminit.c romstage-y += ram_calc.c romstage-y += early_init.c romstage-y += report_platform.c -romstage-y += ../../../arch/x86/lib/walkcbfs.S +romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index 330dc00b91..ad4b2ba2f3 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -32,7 +32,7 @@ romstage-y += raminit.c romstage-y += mrccache.c romstage-y += early_init.c romstage-y += report_platform.c -romstage-y += ../../../arch/x86/lib/walkcbfs.S +romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index cb02fd8a68..e5b4385ea9 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -31,7 +31,7 @@ romstage-y += ram_calc.c romstage-y += raminit.c romstage-y += early_init.c romstage-y += ../sandybridge/mrccache.c -romstage-y += ../../../arch/x86/lib/walkcbfs.S +romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index cf79459df2..407b61d8a7 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -40,7 +40,7 @@ romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += ../../../device/dram/ romstage-y += mrccache.c romstage-y += early_init.c romstage-y += report_platform.c -romstage-y += ../../../arch/x86/lib/walkcbfs.S +romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c |