3 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/amd/gx1/raminit.c b/src/northbridge/amd/gx1/raminit.c
index 8525ce4d1f..aa07f49e81 100644
--- a/src/northbridge/amd/gx1/raminit.c
+++ b/src/northbridge/amd/gx1/raminit.c
@@ -46,12 +46,12 @@ void do_refresh(void)
 {
 unsigned int tval, i;
 
-	outb(0x71, 0x80);
+	post_code(0x71);
 	tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1);
 	tval |= RFSHTST;
 	for(i=0; i>NUM_REFRESH; i++)
 		setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
-	outb(0x72, 0x80);
+	post_code(0x72);
 }
 
 
@@ -59,7 +59,7 @@ void enable_dimm(void)
 {
 unsigned int tval, i;
 
-	outb(0x73, 0x80);
+	post_code(0x73);
 
 	/* start SDCLCK's */
 	tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1);
@@ -101,7 +101,7 @@ unsigned int tval, i;
 
 	for(i=0; i<2000; i++)
 		outb(0, 0xed);
-	outb(0x74, 0x80);
+	post_code(0x74);
 }
 
 static unsigned int size_dimm(int dimm_shift)
@@ -321,7 +321,7 @@ static void sdram_init(void)
 unsigned int mem_config = 0x00700070;
 
 	print_debug("Setting up default parameters for memory\n");
-	outb(0x70, 0x80);
+	post_code(0x70);
 
 	setGX1Mem(GX_BASE + MC_MEM_CNTRL2, 0x000007d8); /* Disable all CLKS, Shift = 3 */
 	setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */
@@ -350,5 +350,5 @@ unsigned int mem_config = 0x00700070;
 
 	setGX1Mem(GX_BASE + MC_BANK_CFG, mem_config);
 	enable_dimm();
-	outb(0x7e, 0x80);
+	post_code(0x7e);
 }
diff --git a/src/northbridge/via/cx700/early_serial.c b/src/northbridge/via/cx700/early_serial.c
index 503ebbb057..582570772a 100644
--- a/src/northbridge/via/cx700/early_serial.c
+++ b/src/northbridge/via/cx700/early_serial.c
@@ -47,7 +47,7 @@ static void cx700_writesioword(u16 reg, u16 val)
 
 static void enable_cx700_serial(void)
 {
-	outb(6, 0x80);
+	post_code(0x06);
 
 	// WTH?
 	outb(0x03, 0x22);
@@ -98,5 +98,5 @@ static void enable_cx700_serial(void)
 	// should be done. Dump a char for fun.
 	cx700_writesiobyte(0x3f8, 48);
 
-	outb(7, 0x80);
+	post_code(0x07);
 }
diff --git a/src/northbridge/via/vx800/early_serial.c b/src/northbridge/via/vx800/early_serial.c
index f46341ff15..73e51ee81c 100644
--- a/src/northbridge/via/vx800/early_serial.c
+++ b/src/northbridge/via/vx800/early_serial.c
@@ -55,7 +55,7 @@ static void vx800_writesioword(uint16_t reg, uint16_t val)
 
 void enable_vx800_serial(void)
 {
-	outb(6, 0x80);
+	post_code(0x06);
 	outb(0x03, 0x22);
 
 	//pci_write_config8(PCI_DEV(0,17,0),0xb4,0x7e);
@@ -97,5 +97,5 @@ void enable_vx800_serial(void)
 	vx800_writesiobyte(0x3f9, 0xf);
 	// should be done. Dump a char for fun.
 	vx800_writesiobyte(0x3f8, 48);
-	outb(7, 0x80);
+	post_code(0x07);
 }