diff options
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/raminit_amdmct.c | 6 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/amddefs.h | 14 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 4 |
3 files changed, 15 insertions, 9 deletions
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c index 352d90acf1..0c01cf1a2e 100644 --- a/src/northbridge/amd/amdfam10/raminit_amdmct.c +++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c @@ -78,6 +78,9 @@ static void print_t(const char *strval) #elif CONFIG_CPU_SOCKET_TYPE == 0x13 //ASB2 #include "../amdmct/mct_ddr3/mctardk5.c" +//C32 +#elif CONFIG_CPU_SOCKET_TYPE == 0x14 +#include "../amdmct/mct_ddr3/mctardk5.c" #endif #else /* DDR2 */ @@ -205,6 +208,9 @@ u32 mctGetLogicalCPUID(u32 Node) case 0x10080: ret = AMD_HY_D0; break; + case 0x10081: + ret = AMD_HY_D1; + break; default: /* FIXME: mabe we should die() here. */ print_err("FIXME! CPU Version unknown or not supported! \n"); diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h index 92490975ff..78526681b9 100644 --- a/src/northbridge/amd/amdmct/amddefs.h +++ b/src/northbridge/amd/amdmct/amddefs.h @@ -45,6 +45,7 @@ #define AMD_HY_D0 0x04000000 /* Istanbul D0 */ #define AMD_RB_C3 0x08000000 /* ??? C3 */ #define AMD_DA_C3 0x10000000 /* XXXX C3 */ +#define AMD_HY_D1 0x20000000 /* Istanbul D1 */ /* * Groups - Create as many as you wish, from the above public values @@ -61,19 +62,18 @@ #define AMD_DR_LT_B2 (AMD_DR_B0 | AMD_DR_B1 | AMD_DR_BA) #define AMD_DR_LT_B3 (AMD_DR_B0 | AMD_DR_B1 | AMD_DR_B2 | AMD_DR_BA) #define AMD_DR_GT_B0 (AMD_DR_ALL & ~(AMD_DR_B0)) +#define AMD_DR_GT_Bx (AMD_DR_ALL & ~(AMD_DR_Ax | AMD_DR_Bx)) #define AMD_DR_ALL (AMD_DR_Bx) -#define AMD_FAM10_ALL (AMD_DR_ALL | AMD_RB_C2 | AMD_HY_D0 | AMD_DA_C3 | AMD_DA_C2 | AMD_RB_C3 ) +#define AMD_FAM10_ALL (AMD_DR_ALL | AMD_RB_C2 | AMD_HY_D0 | AMD_DA_C3 | AMD_DA_C2 | AMD_RB_C3 | AMD_HY_D1) #define AMD_FAM10_LT_D (AMD_FAM10_ALL & ~(AMD_HY_D0)) #define AMD_FAM10_GT_B0 (AMD_FAM10_ALL & ~(AMD_DR_B0)) #define AMD_DA_Cx (AMD_DA_C2 | AMD_DA_C3) #define AMD_DR_Cx (AMD_RB_C2 | AMD_RB_C3 | AMD_DA_Cx) #define AMD_FAM10_C3 (AMD_RB_C3 | AMD_DA_C3) -#define AMD_DR_Dx (AMD_HY_D0) -#define AMD_DRBH_Cx (AMD_DR_Cx | AMD_HY_D0 ) -#define AMD_DRBA23_RBC2 (AMD_DR_BA | AMD_DR_B2 | AMD_DR_B3 | AMD_RB_C2 ) - -#define AMD_DR_GT_Bx (AMD_DR_ALL & ~(AMD_DR_Ax | AMD_DR_Bx)) -#define AMD_DR_DAC2_OR_C3 (AMD_DA_C2 | AMD_DA_C3) +#define AMD_DR_Dx (AMD_HY_D0 | AMD_HY_D1) +#define AMD_DRBH_Cx (AMD_DR_Cx | AMD_HY_D0 ) +#define AMD_DRBA23_RBC2 (AMD_DR_BA | AMD_DR_B2 | AMD_DR_B3 | AMD_RB_C2 ) +#define AMD_DR_DAC2_OR_C3 (AMD_DA_C2 | AMD_DA_C3 | AMD_RB_C3) /* * Public Platforms - USE THESE VERSIONS TO MAKE COMPARE WITH CPUPLATFORMTYPE RETURN VALUE diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index 68d16afbf3..5abe6d04dd 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -2407,7 +2407,7 @@ static void mct_DramInit(struct MCTStatStruc *pMCTstat, // FIXME: for rev A: mct_BeforeDramInit_D(pDCTstat, dct); /* Disable auto refresh before Dram init when in ganged mode (Erratum 278) */ - if (pDCTstat->LogicalCPUID & AMD_DR_LT_B2) { + if (pDCTstat->LogicalCPUID & (AMD_DR_B0 | AMD_DR_B1 | AMD_DR_BA)) { if (pDCTstat->GangedMode) { val = Get_NB32(pDCTstat->dev_dct, 0x8C + (0x100 * dct)); val |= 1 << DisAutoRefresh; @@ -2421,7 +2421,7 @@ static void mct_DramInit(struct MCTStatStruc *pMCTstat, * to ensure both DCTs are in sync (Erratum 278) */ - if (pDCTstat->LogicalCPUID & AMD_DR_LT_B2) { + if (pDCTstat->LogicalCPUID & (AMD_DR_B0 | AMD_DR_B1 | AMD_DR_BA)) { if (pDCTstat->GangedMode) { do { val = Get_NB32(pDCTstat->dev_dct, 0x90 + (0x100 * dct)); |