aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/resourcemap.c2
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c33
-rw-r--r--src/northbridge/amd/amdk8/raminit.c5
-rw-r--r--src/northbridge/amd/amdk8/raminit_f.c5
-rw-r--r--src/northbridge/amd/amdk8/raminit_test.c3
-rw-r--r--src/northbridge/amd/amdk8/resourcemap.c2
-rw-r--r--src/northbridge/amd/gx2/chipsetinit.c2
-rw-r--r--src/northbridge/intel/e7501/raminit.c3
-rw-r--r--src/northbridge/intel/e7520/raminit.c3
-rw-r--r--src/northbridge/intel/e7520/raminit_test.c3
-rw-r--r--src/northbridge/intel/e7525/raminit.c3
-rw-r--r--src/northbridge/intel/e7525/raminit_test.c3
-rw-r--r--src/northbridge/intel/i3100/raminit.c3
-rw-r--r--src/northbridge/intel/i440bx/raminit.c3
-rw-r--r--src/northbridge/intel/i855pm/raminit.c2
-rw-r--r--src/northbridge/via/vt8601/northbridge.c2
-rw-r--r--src/northbridge/via/vt8623/northbridge.c2
17 files changed, 45 insertions, 34 deletions
diff --git a/src/northbridge/amd/amdfam10/resourcemap.c b/src/northbridge/amd/amdfam10/resourcemap.c
index cb445a1260..49d546861c 100644
--- a/src/northbridge/amd/amdfam10/resourcemap.c
+++ b/src/northbridge/amd/amdfam10/resourcemap.c
@@ -281,7 +281,7 @@ static void setup_default_resource_map(void)
};
u32 max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
setup_resource_map(register_values, max);
}
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 39602181c1..c331a1e53d 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -66,6 +66,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/hypertransport_def.h>
+#include <stdlib.h>
#include "arch/romcc_io.h"
#include "amdk8.h"
@@ -510,7 +511,7 @@ static void setup_remote_node(u8 node)
print_spew("setup_remote_node: ");
/* copy the default resource map from node 0 */
- for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
+ for(i = 0; i < ARRAY_SIZE(pci_reg); i++) {
uint32_t value;
uint8_t reg;
reg = pci_reg[i];
@@ -802,7 +803,7 @@ static unsigned setup_smp4(void)
};
#endif
- setup_row_indirect_group(conn4_1, sizeof(conn4_1)/sizeof(conn4_1[0]));
+ setup_row_indirect_group(conn4_1, ARRAY_SIZE(conn4_1));
setup_temp_row(0,2);
verify_connection(7);
@@ -893,7 +894,7 @@ static unsigned setup_smp4(void)
3,0,1,1,
};
#endif
- setup_remote_row_indirect_group(conn4_3, sizeof(conn4_3)/sizeof(conn4_3[0]));
+ setup_remote_row_indirect_group(conn4_3, ARRAY_SIZE(conn4_3));
/* ready to enable RT for Node 3 */
rename_temp_node(3);
@@ -909,7 +910,7 @@ static unsigned setup_smp4(void)
2,1,0,1,
};
#endif
- setup_row_indirect_group(conn4_2, sizeof(conn4_2)/sizeof(conn4_2[0]));
+ setup_row_indirect_group(conn4_2, ARRAY_SIZE(conn4_2));
#if 0
/*We need to do sth to reverse work for setup_temp_row (0,1) (1,3) */
@@ -974,7 +975,7 @@ static unsigned setup_smp6(void)
#endif
};
- setup_row_indirect_group(conn6_1, sizeof(conn6_1)/sizeof(conn6_1[0]));
+ setup_row_indirect_group(conn6_1, ARRAY_SIZE(conn6_1));
for(byte=0; byte<4; byte+=2) {
setup_temp_row(byte,byte+2);
@@ -998,7 +999,7 @@ static unsigned setup_smp6(void)
#endif
};
- setup_remote_row_indirect_group(conn6_2, sizeof(conn6_2)/sizeof(conn6_2[0]));
+ setup_remote_row_indirect_group(conn6_2, ARRAY_SIZE(conn6_2));
rename_temp_node(4);
enable_routing(4);
@@ -1084,7 +1085,7 @@ static unsigned setup_smp6(void)
#endif
};
- setup_remote_row_indirect_group(conn6_3, sizeof(conn6_3)/sizeof(conn6_3[0]));
+ setup_remote_row_indirect_group(conn6_3, ARRAY_SIZE(conn6_3));
/* ready to enable RT for 5 */
rename_temp_node(5);
@@ -1110,7 +1111,7 @@ static unsigned setup_smp6(void)
#endif
};
- setup_row_indirect_group(conn6_4, sizeof(conn6_4)/sizeof(conn6_4[0]));
+ setup_row_indirect_group(conn6_4, ARRAY_SIZE(conn6_4));
#if 0
/* We need to do sth about reverse about setup_temp_row (0,1), (2,4), (1, 3), (3,5)
@@ -1202,7 +1203,7 @@ static unsigned setup_smp8(void)
#endif
};
- setup_row_indirect_group(conn8_1,sizeof(conn8_1)/sizeof(conn8_1[0]));
+ setup_row_indirect_group(conn8_1,ARRAY_SIZE(conn8_1));
for(byte=0; byte<6; byte+=2) {
setup_temp_row(byte,byte+2);
@@ -1225,7 +1226,7 @@ static unsigned setup_smp8(void)
#endif
};
- setup_remote_row_indirect_group(conn8_2, sizeof(conn8_2)/sizeof(conn8_2[0]));
+ setup_remote_row_indirect_group(conn8_2, ARRAY_SIZE(conn8_2));
#if CROSS_BAR_47_56
//init 5, 6 here
@@ -1414,7 +1415,7 @@ static unsigned setup_smp8(void)
#endif
};
- setup_row_indirect_group(conn8_3, sizeof(conn8_3)/sizeof(conn8_3[0]));
+ setup_row_indirect_group(conn8_3, ARRAY_SIZE(conn8_3));
#if CROSS_BAR_47_56
/* for 47, 56, 57, 75, 46, 64 we need to substract another link to
@@ -1455,7 +1456,7 @@ static unsigned setup_smp8(void)
7, 3, 6,
};
- opt_broadcast_rt_group(conn8_4, sizeof(conn8_4)/sizeof(conn8_4[0]));
+ opt_broadcast_rt_group(conn8_4, ARRAY_SIZE(conn8_4));
static const u8 conn8_5[] = {
2, 7, 0,
@@ -1463,7 +1464,7 @@ static unsigned setup_smp8(void)
3, 6, 1,
};
- opt_broadcast_rt_plus_group(conn8_5, sizeof(conn8_5)/sizeof(conn8_5[0]));
+ opt_broadcast_rt_plus_group(conn8_5, ARRAY_SIZE(conn8_5));
#endif
@@ -1770,7 +1771,7 @@ static int optimize_link_coherent_ht(void)
1,3,
2,3,
};
- needs_reset |= optimize_connection_group(opt_conn4, sizeof(opt_conn4)/sizeof(opt_conn4[0]));
+ needs_reset |= optimize_connection_group(opt_conn4, ARRAY_SIZE(opt_conn4));
}
#endif
@@ -1783,7 +1784,7 @@ static int optimize_link_coherent_ht(void)
4, 5,
#endif
};
- needs_reset |= optimize_connection_group(opt_conn6, sizeof(opt_conn6)/sizeof(opt_conn6[0]));
+ needs_reset |= optimize_connection_group(opt_conn6, ARRAY_SIZE(opt_conn6));
}
#endif
@@ -1798,7 +1799,7 @@ static int optimize_link_coherent_ht(void)
5, 7,
6, 7,
};
- needs_reset |= optimize_connection_group(opt_conn8, sizeof(opt_conn8)/sizeof(opt_conn8[0]));
+ needs_reset |= optimize_connection_group(opt_conn8, ARRAY_SIZE(opt_conn8));
}
#endif
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 2e05bffe0f..51c2321b44 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -10,6 +10,7 @@
#include <cpu/x86/mem.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
+#include <stdlib.h>
#include "raminit.h"
#include "amdk8.h"
@@ -555,7 +556,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
print_spew("setting up CPU");
print_spew_hex8(ctrl->node_id);
print_spew(" northbridge registers\r\n");
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for(i = 0; i < max; i += 3) {
device_t dev;
unsigned where;
@@ -1303,7 +1304,7 @@ static long spd_enable_2channels(const struct mem_controller *ctrl, long dimm_ma
}
device0 = ctrl->channel0[i];
device1 = ctrl->channel1[i];
- for(j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) {
+ for(j = 0; j < ARRAY_SIZE(addresses); j++) {
unsigned addr;
addr = addresses[j];
value0 = spd_read_byte(device0, addr);
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index 94b1d461ef..a883fa401d 100644
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -25,6 +25,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/tsc.h>
+#include <stdlib.h>
#include "raminit.h"
#include "amdk8_f.h"
#include "spd_ddr2.h"
@@ -715,7 +716,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_in
print_spew("setting up CPU");
print_spew_hex8(ctrl->node_id);
print_spew(" northbridge registers\r\n");
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for (i = 0; i < max; i += 3) {
device_t dev;
unsigned where;
@@ -1496,7 +1497,7 @@ static long spd_enable_2channels(const struct mem_controller *ctrl, struct mem_i
}
device0 = ctrl->channel0[i];
device1 = ctrl->channel1[i];
- for (j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) {
+ for (j = 0; j < ARRAY_SIZE(addresses); j++) {
unsigned addr;
addr = addresses[j];
value0 = spd_read_byte(device0, addr);
diff --git a/src/northbridge/amd/amdk8/raminit_test.c b/src/northbridge/amd/amdk8/raminit_test.c
index 8e323ea859..b3a4641355 100644
--- a/src/northbridge/amd/amdk8/raminit_test.c
+++ b/src/northbridge/amd/amdk8/raminit_test.c
@@ -4,6 +4,7 @@
#include <string.h>
#include <setjmp.h>
#include <device/pci_def.h>
+#include <stdlib.h>
#include "amdk8.h"
jmp_buf end_buf;
@@ -341,7 +342,7 @@ static void raminit_main(void)
};
console_init();
memreset_setup();
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+ sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
diff --git a/src/northbridge/amd/amdk8/resourcemap.c b/src/northbridge/amd/amdk8/resourcemap.c
index 95ac3b6366..4b6833204c 100644
--- a/src/northbridge/amd/amdk8/resourcemap.c
+++ b/src/northbridge/amd/amdk8/resourcemap.c
@@ -253,6 +253,6 @@ static void setup_default_resource_map(void)
PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
};
int max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
setup_resource_map(register_values, max);
}
diff --git a/src/northbridge/amd/gx2/chipsetinit.c b/src/northbridge/amd/gx2/chipsetinit.c
index 4751886a45..e75135d719 100644
--- a/src/northbridge/amd/gx2/chipsetinit.c
+++ b/src/northbridge/amd/gx2/chipsetinit.c
@@ -177,7 +177,7 @@ struct FLASH_DEVICE FlashInitTable[] = {
{ FLASH_TYPE_NONE, 0, 0 }, /* CS3, or Flash Device 3 */
};
-#define FlashInitTableLen (sizeof(FlashInitTable)/sizeof(FlashInitTable[0]))
+#define FlashInitTableLen (ARRAY_SIZE(FlashInitTable))
uint32_t FlashPort[] = {
MDD_LBAR_FLSH0,
diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c
index 1aeb4f05d9..4695915763 100644
--- a/src/northbridge/intel/e7501/raminit.c
+++ b/src/northbridge/intel/e7501/raminit.c
@@ -14,6 +14,7 @@
#include <assert.h>
#include <spd.h>
#include <sdram_mode.h>
+#include <stdlib.h>
#include "e7501.h"
// Uncomment this to enable run-time checking of DIMM parameters
@@ -1631,7 +1632,7 @@ static void RAM_RESET_DDR_PTR(const struct mem_controller *ctrl)
static void ram_set_d0f0_regs(const struct mem_controller *ctrl)
{
int i;
- int num_values = sizeof(constant_register_values)/sizeof(constant_register_values[0]);
+ int num_values = ARRAY_SIZE(constant_register_values);
ASSERT((num_values % 3) == 0); // Bad table?
diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c
index 672a117d7e..27ed477d9a 100644
--- a/src/northbridge/intel/e7520/raminit.c
+++ b/src/northbridge/intel/e7520/raminit.c
@@ -21,6 +21,7 @@
#include <cpu/x86/mem.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#include <stdlib.h>
#include "raminit.h"
#include "e7520.h"
@@ -62,7 +63,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
int i;
int max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for(i = 0; i < max; i += 3) {
device_t dev;
unsigned where;
diff --git a/src/northbridge/intel/e7520/raminit_test.c b/src/northbridge/intel/e7520/raminit_test.c
index a69bafdac9..4716a29430 100644
--- a/src/northbridge/intel/e7520/raminit_test.c
+++ b/src/northbridge/intel/e7520/raminit_test.c
@@ -4,6 +4,7 @@
#include <string.h>
#include <setjmp.h>
#include <device/pci_def.h>
+#include <stdlib.h>
#include "e7520.h"
jmp_buf end_buf;
@@ -341,7 +342,7 @@ static void raminit_main(void)
};
console_init();
memreset_setup();
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+ sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c
index 5b2d1dc2bd..313dc0f930 100644
--- a/src/northbridge/intel/e7525/raminit.c
+++ b/src/northbridge/intel/e7525/raminit.c
@@ -21,6 +21,7 @@
#include <cpu/x86/mem.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#include <stdlib.h>
#include "raminit.h"
#include "e7525.h"
@@ -62,7 +63,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
int i;
int max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for(i = 0; i < max; i += 3) {
device_t dev;
unsigned where;
diff --git a/src/northbridge/intel/e7525/raminit_test.c b/src/northbridge/intel/e7525/raminit_test.c
index 2d44d25403..0fdb5848cc 100644
--- a/src/northbridge/intel/e7525/raminit_test.c
+++ b/src/northbridge/intel/e7525/raminit_test.c
@@ -4,6 +4,7 @@
#include <string.h>
#include <setjmp.h>
#include <device/pci_def.h>
+#include <stdlib.h>
#include "e7525.h"
jmp_buf end_buf;
@@ -313,7 +314,7 @@ static void raminit_main(void)
};
console_init();
memreset_setup();
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+ sdram_initialize(ARRAY_SIZE(cpu), cpu);
}
#endif
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index f6ddecb18f..af0f5d57b5 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -22,6 +22,7 @@
#include <cpu/x86/mem.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
+#include <stdlib.h>
#include "raminit.h"
#include "i3100.h"
@@ -64,7 +65,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
int i;
int max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for(i = 0; i < max; i += 3) {
device_t dev;
u32 where;
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 38470eab20..58a158c389 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -21,6 +21,7 @@
#include <spd.h>
#include <sdram_mode.h>
#include <delay.h>
+#include <stdlib.h>
#include "i440bx.h"
/*-----------------------------------------------------------------------------
@@ -430,7 +431,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
PRINT_DEBUG("Northbridge prior to SDRAM init:\r\n");
DUMPNORTH();
- max = sizeof(register_values) / sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
/* Set registers as specified in the register_values[] array. */
for (i = 0; i < max; i += 3) {
diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c
index 9a0f7c08d9..8e97c10bd0 100644
--- a/src/northbridge/intel/i855pm/raminit.c
+++ b/src/northbridge/intel/i855pm/raminit.c
@@ -384,7 +384,7 @@ static void ram_set_d0f0_regs(const struct mem_controller *ctrl) {
#endif
int i;
int max;
- max = sizeof(register_values)/sizeof(register_values[0]);
+ max = ARRAY_SIZE(register_values);
for(i = 0; i < max; i += 3) {
uint32_t reg;
#if DEBUG_RAM_CONFIG >=2
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 76d93f0ddb..36a118ca71 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -115,7 +115,7 @@ static void pci_domain_set_resources(device_t dev)
unsigned char rambits;
int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
+ for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
unsigned char reg;
reg = pci_read_config8(mc_dev, ramregs[i]);
/* these are ENDING addresses, not sizes.
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index e2bab04afe..80a314c18a 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -287,7 +287,7 @@ static void pci_domain_set_resources(device_t dev)
unsigned char rambits;
int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
+ for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
unsigned char reg;
reg = pci_read_config8(mc_dev, ramregs[i]);
/* these are ENDING addresses, not sizes.