summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/agesa_helper.h19
-rw-r--r--src/northbridge/amd/agesa/oem_s3.c1
2 files changed, 20 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/agesa_helper.h b/src/northbridge/amd/agesa/agesa_helper.h
index 73f927e576..82963c1f04 100644
--- a/src/northbridge/amd/agesa/agesa_helper.h
+++ b/src/northbridge/amd/agesa/agesa_helper.h
@@ -16,6 +16,8 @@
#ifndef _AGESA_HELPER_H_
#define _AGESA_HELPER_H_
+#include <stddef.h>
+
enum {
PICK_DMI, /* DMI Interface */
PICK_PSTATE, /* Acpi Pstate SSDT Table */
@@ -33,4 +35,21 @@ void amd_initcpuio(void);
void amd_initmmio(void);
void amd_initenv(void);
+void *GetHeapBase(void);
+void EmptyHeap(void);
+void ResumeHeap(void **heap, size_t *len);
+
+#define BSP_STACK_BASE_ADDR 0x30000
+
+#if 1
+/* This covers node 0 only. */
+#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR)
+#else
+/* This covers total of 8 nodes. */
+#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR)
+#endif
+
+#define HIGH_MEMORY_SCRATCH 0x30000
+
+
#endif /* _AGESA_HELPER_H_ */
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c
index c7d23ff346..a9504acb05 100644
--- a/src/northbridge/amd/agesa/oem_s3.c
+++ b/src/northbridge/amd/agesa/oem_s3.c
@@ -21,6 +21,7 @@
#include <cpu/amd/agesa/s3_resume.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <AGESA.h>
+#include <northbridge/amd/agesa/agesa_helper.h>
typedef enum {
S3DataTypeNonVolatile = 0, ///< NonVolatile Data Type