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-rw-r--r--src/northbridge/intel/sandybridge/early_init.c10
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h6
2 files changed, 2 insertions, 14 deletions
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 779f29befd..a013ec3707 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -233,15 +233,9 @@ void northbridge_romstage_finalize(int s3resume)
* this is not a resume. In that case we just create the cbmem toc.
*/
- *(u32 *)CBMEM_BOOT_MODE = 0;
- *(u32 *)CBMEM_RESUME_BACKUP = 0;
-
if (s3resume) {
- void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
- if (resume_backup_memory) {
- *(u32 *)CBMEM_BOOT_MODE = 2;
- *(u32 *)CBMEM_RESUME_BACKUP = (u32)resume_backup_memory;
- }
+ acpi_prepare_for_resume();
+
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
} else {
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 972ed9f0a2..e737e50f65 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -196,12 +196,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
-/* Delegation of resume backup memory so we don't have to
- * (slowly) handle backing up OS memory in romstage.c
- */
-#define CBMEM_BOOT_MODE 0x610
-#define CBMEM_RESUME_BACKUP 0x614
-
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }