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-rw-r--r--src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
index f7bb023b59..0537c54769 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
@@ -89,7 +89,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
/* Initialize the UPD Data */
- GetUpdDefaultFromFsp (fsp_ptr, fsp_upd_data);/home/martin/extra/git/coreboot
+ GetUpdDefaultFromFsp (fsp_ptr, fsp_upd_data);
ConfigureDefaultUpdData(fsp_upd_data);
#else
pFspRtBuffer->Platform.MemoryConfig = &MemoryConfig;