aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/x4x
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/acpi.c2
-rw-r--r--src/northbridge/intel/x4x/gma.c8
-rw-r--r--src/northbridge/intel/x4x/northbridge.c6
3 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index 1b016bc2f3..da9ed40687 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -30,7 +30,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
u32 pciexbar = 0;
u32 length = 0;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ dev = pcidev_on_root(0, 0);
if (!decode_pciebar(&pciexbar, &length))
return current;
diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c
index 1fcc682c86..680b83698b 100644
--- a/src/northbridge/intel/x4x/gma.c
+++ b/src/northbridge/intel/x4x/gma.c
@@ -69,10 +69,10 @@ static void gma_func0_init(struct device *dev)
pci_write_config32(dev, PCI_COMMAND, reg32);
/* configure GMBUSFREQ */
- reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc);
+ reg16 = pci_read_config16(pcidev_on_root(0x2, 0), 0xcc);
reg16 &= ~0x1ff;
reg16 |= 0xbc;
- pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16);
+ pci_write_config16(pcidev_on_root(0x2, 0), 0xcc, reg16);
int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1;
@@ -93,7 +93,7 @@ static void gma_func0_init(struct device *dev)
static void gma_func0_disable(struct device *dev)
{
- struct device *dev_host = dev_find_slot(0, PCI_DEVFN(0, 0));
+ struct device *dev_host = pcidev_on_root(0, 0);
u16 ggc;
ggc = pci_read_config16(dev_host, D0F0_GGC);
@@ -117,7 +117,7 @@ static void gma_set_subsystem(struct device *dev, unsigned int vendor,
const struct i915_gpu_controller_info *
intel_gma_get_controller_info(void)
{
- struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
+ struct device *dev = pcidev_on_root(0x2, 0);
if (!dev)
return NULL;
struct northbridge_intel_x4x_config *chip = dev->chip_info;
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index ab58c94b44..7de39d1672 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -45,7 +45,7 @@ static void mch_domain_read_resources(struct device *dev)
pci_domain_read_resources(dev);
- struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+ struct device *mch = pcidev_on_root(0, 0);
/* Top of Upper Usable DRAM, including remap */
touud = pci_read_config16(mch, D0F0_TOUUD);
@@ -174,7 +174,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
void northbridge_write_smram(u8 smram)
{
- struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ struct device *dev = pcidev_on_root(0, 0);
if (dev == NULL)
die("could not find pci 00:00.0!\n");
@@ -266,7 +266,7 @@ static void x4x_init(void *const chip_info)
}
for (; fn >= 0; --fn) {
const struct device *const d =
- dev_find_slot(0, PCI_DEVFN(dev, fn));
+ pcidev_on_root(dev, fn);
if (!d || d->enabled)
continue;
const u32 deven = pci_read_config32(d0f0, D0F0_DEVEN);