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Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/memmap.c4
-rw-r--r--src/northbridge/intel/x4x/northbridge.c4
2 files changed, 3 insertions, 5 deletions
diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c
index 0b085cf6da..3e6cf113ae 100644
--- a/src/northbridge/intel/x4x/memmap.c
+++ b/src/northbridge/intel/x4x/memmap.c
@@ -84,12 +84,10 @@ void smm_region(uintptr_t *start, size_t *size)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- uintptr_t top_of_ram;
-
/* Cache 8 MiB region below the top of RAM and 2 MiB above top of
* RAM to cover both cbmem as the TSEG region.
*/
- top_of_ram = (uintptr_t)cbmem_top();
+ const uintptr_t top_of_ram = cbmem_top();
postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB,
MTRR_TYPE_WRBACK);
postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(),
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 4987cae2f1..69eb951702 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -45,7 +45,7 @@ static void mch_domain_read_resources(struct device *dev)
ram_from_to(dev, index++, 0, 0xa0000);
mmio_from_to(dev, index++, 0xa0000, 0xc0000);
reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
- ram_from_to(dev, index++, 1 * MiB, (uintptr_t)cbmem_top());
+ ram_from_to(dev, index++, 1 * MiB, cbmem_top());
/*
* If >= 4GB installed then memory from TOLUD to 4GB
@@ -57,7 +57,7 @@ static void mch_domain_read_resources(struct device *dev)
size_t tseg_size;
smm_region(&tseg_base, &tseg_size);
mmio_from_to(dev, index++, tseg_base, tolud);
- reserved_ram_from_to(dev, index++, (uintptr_t)cbmem_top(), tseg_base);
+ reserved_ram_from_to(dev, index++, cbmem_top(), tseg_base);
/* Reserve high memory where the NB BARs are up to 4GiB */
mmio_from_to(dev, index++, DEFAULT_HECIBAR, 4ull * GiB);