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-rw-r--r--src/northbridge/intel/sandybridge/romstage.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 71b8e12782..a6f626a114 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <cf9_reset.h>
#include <device/pci_ops.h>
-#include <cpu/x86/lapic.h>
#include <romstage_handoff.h>
#include "sandybridge.h"
#include <arch/romstage.h>
@@ -54,8 +53,6 @@ void mainboard_romstage_entry(void)
if (mchbar_read16(SSKPD_HI) == 0xcafe)
system_reset();
- enable_lapic();
-
/* Init LPC, GPIO, BARs, disable watchdog ... */
early_pch_init();