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-rw-r--r--src/northbridge/intel/sandybridge/acpi/hostbridge.asl3
-rw-r--r--src/northbridge/intel/sandybridge/romstage_native.c1
2 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
index 690c072e72..427927182d 100644
--- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
@@ -378,6 +378,3 @@ Method (_CRS, 0, Serialized)
Return (MCRS)
}
-
-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */
-#include "acpi/sandybridge_pci_irqs.asl"
diff --git a/src/northbridge/intel/sandybridge/romstage_native.c b/src/northbridge/intel/sandybridge/romstage_native.c
index 67c64d7898..902d66d0b9 100644
--- a/src/northbridge/intel/sandybridge/romstage_native.c
+++ b/src/northbridge/intel/sandybridge/romstage_native.c
@@ -91,6 +91,7 @@ void main(unsigned long bist)
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3c);
+ southbridge_configure_default_intmap();
rcba_config();
post_code(0x3d);