3 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 42957e540b..b7ee3225ec 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -6,7 +6,6 @@
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <option.h>
-#include <romstage_handoff.h>
 #include <types.h>
 
 #include "sandybridge.h"
@@ -194,9 +193,7 @@ void systemagent_early_init(void)
 	start_peg_link_training();
 }
 
-void northbridge_romstage_finalize(int s3resume)
+void northbridge_romstage_finalize(void)
 {
 	MCHBAR16(SSKPD_HI) = 0xCAFE;
-
-	romstage_handoff_init(s3resume);
 }
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 5c0dd5c1a7..fad8e2f91a 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -4,6 +4,7 @@
 #include <cf9_reset.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/lapic.h>
+#include <romstage_handoff.h>
 #include <timestamp.h>
 #include "sandybridge.h"
 #include <arch/romstage.h>
@@ -75,7 +76,9 @@ void mainboard_romstage_entry(void)
 
 	post_code(0x3d);
 
-	northbridge_romstage_finalize(s3resume);
+	northbridge_romstage_finalize();
 
 	post_code(0x3f);
+
+	romstage_handoff_init(s3resume);
 }
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 27295955b1..63b51b0bc5 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -72,7 +72,7 @@ void intel_sandybridge_finalize_smm(void);
 void systemagent_early_init(void);
 void sandybridge_init_iommu(void);
 void sandybridge_late_initialization(void);
-void northbridge_romstage_finalize(int s3resume);
+void northbridge_romstage_finalize(void);
 void early_init_dmi(void);
 
 /* mainboard_early_init: Optional callback, run after console init but before raminit. */