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Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 079e1b13ba..7d1c019207 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -82,9 +82,6 @@ void mainboard_romstage_entry(void) mainboard_early_init(s3resume); - /* Enable SPD ROMs and DDR-III DRAM */ - enable_smbus(); - post_code(0x39); perform_raminit(s3resume); |