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-rw-r--r--src/northbridge/intel/sandybridge/acpi.c1
-rw-r--r--src/northbridge/intel/sandybridge/bootblock.c1
-rw-r--r--src/northbridge/intel/sandybridge/early_init.c1
-rw-r--r--src/northbridge/intel/sandybridge/iommu.c1
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c1
-rw-r--r--src/northbridge/intel/sandybridge/pcie.c1
-rw-r--r--src/northbridge/intel/sandybridge/ram_calc.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c1
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c1
11 files changed, 11 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index c2743189fb..4afb54646d 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -21,6 +21,7 @@
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "sandybridge.h"
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 05b0c7558c..c35a49a51b 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
/* Just re-define this instead of including sandybridge.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index f8ecc1a77a..01787f13a9 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <device/pci_def.h>
#include <elog.h>
diff --git a/src/northbridge/intel/sandybridge/iommu.c b/src/northbridge/intel/sandybridge/iommu.c
index 017c73233c..26bbdf995b 100644
--- a/src/northbridge/intel/sandybridge/iommu.c
+++ b/src/northbridge/intel/sandybridge/iommu.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 0d644ca14a..4d00d738cd 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_206ax/model_206ax.h>
diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c
index bb88c7a02e..53fb4d3530 100644
--- a/src/northbridge/intel/sandybridge/pcie.c
+++ b/src/northbridge/intel/sandybridge/pcie.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <assert.h>
diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/ram_calc.c
index 00e3e785a7..0e5127de94 100644
--- a/src/northbridge/intel/sandybridge/ram_calc.c
+++ b/src/northbridge/intel/sandybridge/ram_calc.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 5f7fd0a8ca..115d515517 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <halt.h>
#include <timestamp.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 489758135d..afdd9084c4 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/chip.h>
#include <device/pci_def.h>
#include <delay.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index af9b490554..6142388c5b 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -18,6 +18,7 @@
#include <bootmode.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <arch/cbfs.h>
#include <cbfs.h>
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 26f49772f8..c979897354 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
#include <timestamp.h>
#include "sandybridge.h"